K4F661612B Datasheet, PDF (1/35 Pages) Samsung semiconductor – 4M x 16bit CMOS Dynamic RAM with Fast Page Mode

K4F661612B,K4F641612B
CMOS DRAM
4M x 16bit CMOS Dynamic RAM with Fast Page Mode
DESCRIPTION
This is a family of 4,194,304 x 16 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory
cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -50 or -60), power consumption(Normal or Low power)
are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities.
Furthermore, Self-refresh operation is available in L-version. This 4Mx16 Fast Page Mode DRAM family is fabricated using Samsung′s
advanced CMOS process to realize high band-width, low power consumption and high reliability.
FEATURES
• Part Identification
- K4F661612B-TC/L(3.3V, 8K Ref., TSOP)
- K4F641612B-TC/L(3.3V, 4K Ref., TSOP)
• Active Power Dissipation
Speed
8K
-45
360
-50
324
-60
288
Unit : mW
4K
468
432
396
• Refresh Cycles
Part
NO.
K4F661612B*
K4F641612B
Refresh
cycle
8K
4K
Refresh time
Normal L-ver
64ms 128ms
* Access mode & RAS only refresh mode
: 8K cycle/64ms(Normal), 8K cycle/128ms(L-ver.)
CAS-before-RAS & Hidden refresh mode
: 4K cycle/64ms(Normal), 4K cycle/128ms(L-ver.)
• Performance Range
Speed tRAC
tCAC
-45
45ns 12ns
-50
50ns 13ns
-60
60ns 15ns
tRC
80ns
90ns
110ns
tPC
31ns
35ns
40ns
• Fast Page Mode operation
• 2CAS Byte/Word Read/Write operation
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Self-refresh capability (L-ver only)
• Fast parallel test mode capability
• LVTTL(3.3V) compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
• Available in Plastic TSOP(II) packages
• +3.3V±0.3V power supply
FUNCTIONAL BLOCK DIAGRAM
RAS
UCAS
LCAS
W
Control
Clocks
VBB Generator
Refresh Timer
Refresh Control
Refresh Counter
A0~A12
(A0~A11)*1
A0~A8
(A0~A9)*1
Row Address Buffer
Col. Address Buffer
Note) *1 : 4K Refresh
Row Decoder
Memory Array
4,194,304 x 16
Cells
Column Decoder
Vcc
Vss
Lower
Data in
Buffer
Lower
Data out
Buffer
Upper
Data in
Buffer
Upper
Data out
Buffer
DQ0
to
DQ7
OE
DQ8
to
DQ15
SAMSUNG ELECTRONICS CO., LTD. reserves the right to
change products and specifications without notice.