K4T51043QE Datasheet, PDF (25/45 Pages) Samsung semiconductor – 512Mb E-die DDR2 SDRAM Specification

K4T51043QE
K4T51083QE
K4T51163QE
DDR2 SDRAM
Table 3 - DDR2-400/533 tDS1/tDH1 derating with single-ended data strobe
∆tDS1, ∆tDH1 Derating Values for DDR2-400, DDR2-533(All units in ‘ps’; the note applies to the entire table)
DQS Single-ended Slew Rate
2.0 V/ns
1.5 V/ns
1.0 V/ns
0.9 V/ns
0.8 V/ns
0.7 V/ns
0.6 V/ns
0.5 V/ns
0.4 V/ns
∆tDS ∆tDH ∆tDS ∆tDH ∆tDS ∆tDH ∆tDS ∆tDH ∆tDS ∆tDH ∆tDS ∆tDH ∆tDS ∆tDH ∆tDS ∆tDH ∆tDS ∆tDH
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2.0 188 188 167 146 125 63
-
-
-
-
-
-
-
-
-
-
-
-
1.5 146 167 125 125 83 42 81 43
-
-
-
-
-
-
-
-
-
-
1.0 63 125 42 83 0
0
-2
1
-7 -13
-
-
-
-
-
-
-
-
DQ _{0.9 -}
Slew
rate
0.8
-
V/ns 0.7 -
0.6 -
-
31 69 -11 -14 -13 -13 -18 -27 -29 -45
-
-
-
-
-
-
-
-
- -25 -31 -27 -30 -32 -44 -43 -62 -60 -86 -
-
-
-
-
-
-
-
- -45 -53 -50 -67 -61 -85 -78 -109 -108 -152 -
-
-
-
-
-
-
-
- -74 -96 -85 -114 -102 -138 -138 -181 -183 -246
0.5 -
-
-
-
-
-
-
-
-
- -128 -156 -145 -180 -175 -223 -226 -288
0.4 -
-
-
-
-
-
-
-
-
-
-
- -210 -243 -240 -286 -291 -351
For all input signals the total tDS (setup time) and tDH (hold time) required is calculated by adding the data sheet tDS(base) and tDH(base) value to the
∆tDS and ∆tDH derating value respectively. Example: tDS (total setup time) =tDS(base) +∆tDS.
Setup (tDS) nominal slew rate for a rising signal is defined as the slew rate between the last crossing of VREF(dc) and the first crossing of Vih(ac)min.
Setup (tDS) nominal slew rate for a falling signal is defined as the slew rate between the last crossing of VREF(dc) and the first crossing of Vil(ac)max. If
the actual signal is always earlier than the nominal slew rate line between shaded ’VREF(dc) to ac region’, use nominal slew rate for derating value (See
Figure 5 for differential data strobe and Figure 6 for single-ended data strobe.) If the actual signal is later than the nominal slew rate line anywhere
between shaded ’VREF(dc) to ac region’, the slew rate of a tangent line to the actual signal from the ac level to dc level is used for derating value (see
Figure 7 for differential data strobe and Figure 8 for single-ended data strobe)
Hold (tDH) nominal slew rate for a rising signal is defined as the slew rate between the last crossing of Vil(dc)max and the first crossing of VREF(dc). Hold
(tDH) nominal slew rate for a falling signal is defined as the slew rate between the last crossing of Vih(dc)min and the first crossing of VREF(dc). If the
actual signal is always later than the nominal slew rate line between shaded ’dc level to VREF(dc) region’, use nominal slew rate for derating value (see
Figure 9 for differential data strobe and Figure 10 for single-ended data strobe) If the actual signal is earlier than the nominal slew rate line anywhere
between shaded ’dc to VREF(dc) region’, the slew rate of a tangent line to the actual signal from the dc level to VREF(dc) level is used for derating value
(see Figure 11 for differential data strobe and Figure 12 for single-ended data strobe)
Although for slow slew rates the total setup time might be negative (i.e. a valid input signal will not have reached VIH/IL(ac) at the time of the rising clock
transition) a valid input signal is still required to complete the transition and reach VIH/IL(ac).
For slew rates in between the values listed in Tables 1, 2 and 3, the derating values may obtained by linear interpolation.
These values are typically not subject to production test. They are verified by design and characterization.
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Rev. 1.8 July 2007