HD404639R Datasheet, PDF (92/135 Pages) Renesas Technology Corp – 4-Bit Single-Chip Microcomputer

HD404639R Series
A write signal input to serial mode register 1A discontinues the input of the transmit clock to serial data
register 1 (SR1L: $006, SR1U: $007) and the octal counter, and the octal counter is reset to 000. Therefore,
if a write is performed during data transfer, the serial 1 interrupt request flag (IFS1: $003, bit 2) is set.
Written data is valid from the second instruction execution cycle after the write operation, so the STS
instruction must be executed at least two cycles after that.
Serial mode register 1A (SM1A: $005)
Bit
Initial value
Read/Write
Bit name
3
0
W
SM1A3
2
0
W
SM1A2
1
0
W
SM1A1
0
0
W
SM1A0
SM1A3
0
1
R4₁/SCK₁
mode selection
R4₁
SCK₁
SM1A2
0
1
SM1A1 SM1A0
0
0
1
1
0
1
0
0
1
1
0
1
SCK₁
Output
Output
Input
Prescaler
Clock source division ratio
Prescaler
Refer to
table 27
System clock —
External clock —
Figure 70 Serial Mode Register 1A (SM1A)
Serial Mode Register 1B (SM1B: $028): This register has the following functions (figure 71).
• Serial interface 1 prescaler division ratio selection
• Serial interface 1 output level control in idle states
Serial mode register 1B (SM1B: $028) is a 2-bit write-only register. It cannot be written during data
transfer.
By setting bit 0 (SM1B0) of this register, the serial interface 1 prescaler division ratio is selected. Only bit 0
(SM1B0) can be reset to 0 by MCU reset. By setting bit 1 (SM1B1), the output level of the SO₁ pin is
controlled in idle states of serial interface 1. The output level changes at the same time that SM1B1 is
written to.
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