HD404639R Datasheet, PDF (40/135 Pages) Renesas Technology Corp – 4-Bit Single-Chip Microcomputer

HD404639R Series
The division ratio of the system clock can be selected as 1/4, 1/8, 1/16, or 1/32 by setting bits 0 and 1
(SSR20, SSR21) of system clock select register 2 (SSR2: $02A).
The values of SSR20 and SSR21 are valid after the MCU enters watch mode (SSR22 and SSR23 are valid
directly). The system clock must be stopped when the division ratio is to be changed.
There are two ways for setting the division ratio of the system clock.
• The division ratio is selected by setting SSR20 and SSR21 in active mode (at this time, the presetting
values of SSR20 and SSR21 are valid). This causes the MCU to enter watch mode (system clock is
stopped). When the MCU enters active mode from watch mode, the setting values of SSR20 and
SSR21 become valid.
• The division ratio can also be selected by setting SSR20 and SSR21 in subactive mode. This causes the
MCU to enter active mode via watch mode, thus validating the setting values of SSR20 and SSR21 (so
does the case of direct transition).
After RESET input or after stop mode has been cancelled, the division ratio of the system clock can be
selected as 1/4 or 1/32 by setting the SEL pin level.
• 1/4 division ratio: Connect SEL to V_CC.
• 1/32 division ratio: Connect SEL to GND.
The division ratio of the subsystem clock can be selected as 1/4 or 1/8 by setting bit 2 (SSR12) of system
clock select register 1 (SSR1: $029).
SSR12 is valid directly after being set, but in order to change the value of SSR12, the MCU must be in
active mode. If SSR12 is changed in subactive mode, the MCU will malfunction.
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