HD404639R Datasheet, PDF (104/135 Pages) Renesas Technology Corp – 4-Bit Single-Chip Microcomputer

HD404639R Series
Serial clock select register 2 (SSR2: $02A)
Bit
Initial value
Read/Write
Bit name
3
0
W
SSR23
2
0
W
SSR22
1
0
W
SSR21
0
0
W
SSR20
SSR23 SSR22 System clock selection
0
0 Selected from 400 kHz, 800 kHz,
2 MHz, 4 MHz ^{* 1}
1 3.58 MHz
1
0 8 MHz ^{* 1}
1 7.16 MHz
SSR21 SSR20 System clock division ratio
0
0 1/4 division
1 1/8 division
1
0 1/16 division
1 1/32 division
Notes: 1. Refer to system clock select register 1 (SSR1) of figure 85.
2. The DTMF frequencies are not affected by the setting of the system clock division ratio.
Figure 86 System Clock Select Register 2(SSR2)
Table 28 Frequency Deviation of the MCU from Standard DTMF
f_OSC = 400 kHz, 800 kHz, 2 MHz, 4 MHz, f_OSC = 3.58 MHz, 7.16 MHz
8 MHz
Standard
DTMF (Hz) MCU (Hz)
Deviation from
Standard (%)
MCU (Hz)
Deviation from
Standard (%)
R1
697
694.44
–0.37
690.58
–0.92
R2
770
769.23
–0.10
764.96
–0.65
R3
852
851.06
–0.11
846.33
–0.67
R4
941
938.97
–0.22
933.75
–0.77
C1
1,209
1,212.12
0.26
1,205.39
–0.30
C2
1,336
1,333.33
–0.20
1,325.92
–0.75
C3
1,477
1,481.48
0.30
1,473.25
–0.25
C4
1,633
1,639.34
0.39
1,630.23
–0.17
Note: This frequency deviation value does not include the frequency deviation due to the oscillator
element. Also note that in this case the ratio of the high level and low level widths in the oscillator
waveform due to the oscillator element will be 50%:50%.
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