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HD404639R Datasheet, PDF (128/135 Pages) Renesas Technology Corp – 4-Bit Single-Chip Microcomputer
HD404639R Series
Item
Symbol Pin(s) Min
Typ
Max Unit Test Condition
Notes
Input
Cin
All pins —
—
15
pF f = 1 MHz, Vin = 0 V
capacitance
except
D13
D13
—
—
15
pF f = 1 MHz, Vin = 0 V
13
D13
—
—
180 pF f = 1 MHz, Vin = 0 V 14
Analog
t CSTB
COMP0– —
—
2
t cyc
11
comparator
COMP3
stabilization time
Notes: Except for the HD407A4639R, when VCC is between 2.2 V and 6.0 V, watch mode can be supported,
and instruction execution is possible in active mode.
1. Bits 0 and 1 (SSR10, SSR11) of system clock select register 1 (SSR1: $029) and bits 2 and 3
(SSR22, SSR23) of system clock select register 2 (SSR2: $02A) must be set according to the
system clock frequency.
2. Bits 0 and 1 (SSR20, SSR21) of system clock select register 2 (SSR2: $02A) must be set
according to the division ratio of the system clock frequency.
3. Bit 2 (SSR12) of system clock select register 1 (SSR1: $029) must be set according to the
division ratio of the subsystem clock frequency.
4. The oscillation stabilization time is the period required for the oscillator to stabilize after VCC
reaches 2.7 V at power-on, or after RESET input goes high or STOPC input goes low when stop
mode is cancelled. At power-on or when stop mode is cancelled, RESET or STOPC must be
input for at least tRC to ensure the oscillation stabilization time. If using a ceramic oscillator,
contact its manufacturer to determine what stabilization time is required, since it will depend on
the circuit constants and stray capacitance. Set bits 0 and 1 (MIS0, MIS1) of the miscellaneous
register (MIS: $00C) according to the system oscillation of the oscillation stabilization time.
5. Bits 0 and 1 (MIS0, MIS1) of the miscellaneous register (MIS: $00C) must be set according to
the oscillation stabilization time of the system clock oscillator.
6. HD407A4639R: VCC = 3.5 V to 5.5 V.
7. Refer to figure 100.
8. Refer to figure 101. The tcyc unit applies when the MCU is in standby or active mode. The tsubcyc
unit applies when the MCU is in watch or subactive mode.
9. Refer to figure 102.
10. Refer to figure 103.
11. Analog comparator stabilization time is the period for the analog comparator to stabilize and for
correct data to be read after entering RD0/COMP0–RD3/COMP3 into analog input mode.
12. Applies to HD40A4638R, HD40A4639R and HD407A4639R.
HD40A4638R, HD40A4639R: VCC = 4.5 V to 6.0 V
HD407A4639R: VCC = 4.5 V to 5.5 V
13. Applies to HD404638R, HD404639R, HD40A4638R and HD40A4639R.
14. Applies to HD407A4639R.
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