HD404639R Datasheet, PDF (48/135 Pages) Renesas Technology Corp – 4-Bit Single-Chip Microcomputer

HD404639R Series
I/O Pin Type
Circuit
Peripheral Input/
function pins output
pins
V_CC
V_CC
Pull-up control signal
HLT
MIS3
Pins
SCK_1, SCK₂
Output data
SCK₁, SCK₂
Input data
SCK₁, SCK₂
Peripheral Output
function pins pins
V_CC
V_CC
V_CC
V_CC
Pull-up control signal
HLT
MIS3
PMOS control
signal
MIS2, SM2B2
Output data ^{SO1, SO2}
SO₁, SO₂
Pull-up control signal
HLT
MIS3
TOB, TOC, TOD
Output data
TOB, TOC, TOD
Input
V_CC
pins
Input data
HLT
MIS3
PDR
SI₁, SI₂, INT₁, etc
SI₁, SI₂, INT₁, INT₂,
INT₃, INT₄, EVNB,
EVND
Input data
INT₀, STOPC
INT₀, STOPC
Notes: 1. The MCU is reset in stop mode, and peripheral function selection is cancelled. The HLT signal
becomes low, and input/output pins enter high-impedance state.
2. The HLT signal is 1 in watch and subactive modes.
D Port (D₀–D₁₃): Consist of 12 input/output pins and 2 input pins addressed by one bit. D₀–D₃ are high-
current sources, D₄–D₁₁ are high-current sinks, and D₁₂ and D₁₃ are input-only pins.
Pins D₀–D₁₁ are set by the SED and SEDD instructions, and reset by the RED and REDD instructions.
Output data is stored in the port data register (PDR) for each pin. All pins D₀–D₁₃ are tested by the TD and
TDD instructions.
The on/off statuses of the output buffers are controlled by D-port data control registers (DCD0–DCD2:
$02C–$02E) that are mapped to memory addresses (figure 28).
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