RX23T Datasheet, PDF (8/98 Pages) Renesas Technology Corp – 40-MHz 32-bit RX MCUs, built-in FPU, 65.6 DMIPS

RX23T Group
1.3 Block Diagram
Figure 1.2 shows a block diagram.
1. Overview
ROM
RAM
ICUb
DTCa
RX CPU
MPU
Clock
generation
circuit
ICUb:
DTCa:
IWDTa:
CRC:
SCIg:
RSPIa:
RIICa
Interrupt controller
Data transfer controller
Independent watchdog timer
CRC (cyclic redundancy check) calculator
Serial communications interface
Serial peripheral interface
I²C bus interface
Figure 1.2
Block Diagram
IWDTa
CRC
SCIg × 2ch
RSPIa × 1ch
RIICa × 1ch
MTU3c × 6ch
POE3b
TMR × 2 channels (unit 0)
TMR × 2 channels (unit 1)
CMT × 2 channels (unit 0)
CMT × 2 channels (unit 1)
12-bit A/D converter × 10 channels
DOC
Comparator C × 3 channels
CAC
Port 0
Port 1
Port 2
Port 3
Port 4
Port 7
Port 9
Port A
Port B
Port D
Port E
MTU3c
POE3b
CMT
DOC
CAC
MPU
TMR
Multi-function timer pulse unit 3
Port output enable 3
Compare match timer
Data operation circuit
Clock frequency accuracy measurement circuit
Memory protection unit
8-bit timer
R01DS0248EJ0110 Rev.1.10
Jan 13, 2016
Page 8 of 98