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RX23T Datasheet, PDF (4/98 Pages) Renesas Technology Corp – 40-MHz 32-bit RX MCUs, built-in FPU, 65.6 DMIPS
RX23T Group
1. Overview
Table 1.1
Outline of Specifications (3/3)
Classification Module/Function
Description
Communication
functions
Serial communications
interfaces (SCIg)
I2C bus interface (RIICa)
 2 channels (channel 1 and 5: SCIg)
 SCIg
Serial communications modes: Asynchronous, clock synchronous, and smart-card interface
On-chip baud rate generator allows selection of the desired bit rate
Choice of LSB-first or MSB-first transfer
Average transfer rate clock can be input from TMR timers for SCI5
Simple I2C
Simple SPI
9-bit transfer mode
Bit rate modulation
 1 channel
 Communications formats: I2C bus format/SMBus format
 Master mode or slave mode selectable
 Supports fast mode
Serial peripheral interface
(RSPIa)
 1 channel
 Transfer facility
Using the MOSI (master out, slave in), MISO (master in, slave out), SSL (slave select), and RSPI
clock (RSPCK) signals enables serial transfer through SPI operation (four lines) or clock-
synchronous operation (three lines)
 Capable of handling serial transfer as a master or slave
 Data formats
 Choice of LSB-first or MSB-first transfer
The number of bits in each transfer can be changed to 8, 9, 10, 11, 12, 13, 14, 15, 16, 20, 24, or
32 bits.
128-bit buffers for transmission and reception
Up to four frames can be transmitted or received in a single transfer operation (with each frame
having up to 32 bits)
 Double buffers for both transmission and reception
12-bit A/D converter (S12ADE)
 12 bits (10 channels × 1 unit)
 12-bit resolution
 Minimum conversion time: 1.0 µs per channel when the ADCLK is operating at 40 MHz
 Operating modes
Scan mode (single scan mode, continuous scan mode, and group scan mode)
Group A priority control (only for group scan mode)
 Sampling variable
Sampling time can be set up for each channel
 Self-diagnostic function
 Double trigger mode (A/D conversion data duplicated)
 Detection of analog input disconnection
 A/D conversion start conditions
A software trigger, a trigger from a timer (MTU, TMR), or an external trigger signal
Comparator C (CMPC)
 3 channels
 Function to compare the reference voltage and the analog input voltage
 Reference voltage: Select from among two voltages
 Analog input voltage: Select from among four voltages
D/A converter (DA) for generating comparator C
reference voltage
 1 channel
 8-bit resolution
 Output voltage: 0 to AVCC0
 Reference voltage generation circuit for comparator C
CRC calculator (CRC)
 CRC code generation for arbitrary amounts of data in 8-bit units
 Select any of three generating polynomials:
X8 + X2 + X + 1, X16 + X15 + X2 + 1, or X16 + X12 + X5 + 1
 Generation of CRC codes for use with LSB-first or MSB-first communications is selectable.
Data operation circuit (DOC)
Comparison, addition, and subtraction of 16-bit data
Power supply voltages/Operating frequencies VCC = 2.7 to 5.5V: 40MHz
Supply current
15 mA at 40 MHz (typ.)
Operating temperature range
D version: 40 to +85°C, G version: 40 to +105°C
Packages
64-pin LFQFP 0.5mm pitch
52-pin LQFP 0.65mm pitch
48-pin LFQFP 0.5mm pitch
On-chip debugging system
E1 emulator (FINE interface)
R01DS0248EJ0110 Rev.1.10
Jan 13, 2016
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