RX23T Datasheet, PDF (67/98 Pages) Renesas Technology Corp – 40-MHz 32-bit RX MCUs, built-in FPU, 65.6 DMIPS

RX23T Group
5. Electrical Characteristics
Table 5.25 Timing of On-Chip Peripheral Modules (3)
Conditions: VCC = 2.7 V to 5.5 V, AVCC0 = VREFH0 = VCC to 5.5 V, VSS = AVSS0 = VREFL0 = 0 V, T_a = –40 to +105°C,
C = 30pF
Item
Simple SCK clock cycle output (master)
SPI
SCK clock cycle input (slave)
SCK clock high pulse width
SCK clock low pulse width
SCK clock rise/fall time
Data input setup time (master)
Data input setup time (slave)
Data input hold time
SS input setup time
SS input hold time
Data output delay time (master)
Data output delay time (slave)
Data output hold time (master)
Data rise/fall time
SS input rise/fall time
Slave access time
Slave output release time
VCC = 4.0 V or
above
VCC = 2.7 V or
above
VCC = 4.0 V or
above
VCC = 2.7 V or
above
Master
Slave
Symbol
t_SPcyc
t_SPCKWH
t_SPCKWL
t_SPCKr, t_SPCKf
t_SU
t_H
t_LEAD
t_LAG
t_OD
t_OH
t_Dr, t_Df
t_SSLr, t_SSLf
t_SA
t_REL
Min.
Max.
Unit*¹
Test
Conditions
4
65536
t_Pcyc Figure 5.42
6
65536
t_Pcyc
0.4
0.6
t_SPcyc
0.4
0.6
t_SPcyc
—
20
ns
40
—
ns Figure 5.43,
Figure 5.44
65
—
40
—
40
—
ns
3
—
t_SPcyc
3
—
t_SPcyc
—
40
ns
—
40
—
65
–10
—
ns
–10
—
—
20
ns
—
20
ns
—
6
t_Pcyc Figure 5.45,
—
6
t_Pcyc
Figure 5.46
Note 1. t_Pcyc: PCLK cycle
R01DS0248EJ0110 Rev.1.10
Jan 13, 2016
Page 67 of 98