HD6473258F10V Datasheet, PDF (68/301 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

Ø
Address bus
AS: High
RD: High
WR: High
Data bus: high impedance state
T1 state
Bus cycle
T2 state
T3 state
Address
Figure 3-16. Pin States during On-Chip Register Field Access Cycle
Ø
Address bus
AS
RD
WR: High
Data bus
T1 state
Read cycle
T2 state
Fig. 3-16
T3 state
Address
Read data
Figure 3-17 (a). External Device Access Timing (read)
Fig. 3-17 (a)
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