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HD6473258F10V Datasheet, PDF (152/301 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer | |||
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FTI
Sampling clock
Noise canceler output
Rejected as noise
Figure 7-15. Noise Cancellation (Example)
7.7 Sample Application
In the example below, the free-running timer channel is used to generate two square-wave outputs
with a 50% duty factor and arbitrary phase relationship. The programming is as follows:
(1) The CCLRA bit in the TCSR is set to 1.
Fig 7-15
(2) Each time a compare-match interrupt occurs, software inverts the corresponding output level
bit in the TCSR (OLVLA or OLVLB).
FRC
HâFFFF
OCRA
OCRB
Hâ0000
FTOA
FTOB
Clear counter
Figure 7-16. Square-Wave Output (Example)
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