HD6473258F10V Datasheet, PDF (171/301 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

H’FF
TCORA
TCORB
H’00
TCNT
Clear counter
TMO pin
Figure 8-12. Example of Pulse Output
8.6 Application Notes
Application programmers should note that the following types of contention can occur in the 8-bit
timer.
(1) Contention between TCNT Write and Clear: If an internal counter clear signal is generated
during the T3 state of a write cycle to the timer counter, the clear signal takes priority and the write
is not performed.
Figure 8-13 shows this type of contention.
Write cycle: CPU writes to TCNT
T1
T2
T3
Ø
Internal Address
bus
Internal write
signal
Counter clear
signal
TCNT address
TCNT
N
H’00
Figure 8-13. TCNT Write-Clear Contention
Figure 7-13
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