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HD6473258F10V Datasheet, PDF (39/301 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer | |||
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Bit 2âZero (Z): This bit is set to â1â to indicate a zero result and cleared to â0â to indicate a
nonzero result.
Bit 1âOverflow (V): This bit is set to â1â when an arithmetic overflow occurs, and cleared to
â0â at other times.
Bit 0âCarry (C): This bit is used by:
⢠Add and subtract instructions, to indicate a carry or borrow at the most significant bit of the
result
⢠Shift and rotate instructions, to store the value shifted out of the most significant or least
significant bit
⢠Bit manipulation and bit load instructions, as a bit accumulator
The LDC, STC, ANDC, ORC, and XORC instructions enable the CPU to load and store the CCR,
and to set or clear selected bits by logic operations.
Some instructions leave some or all of the flag bits unchanged. The action of each instruction on
the flag bits is shown in Appendix A.1, âInstruction Set List.â See the H8/300 Series
Programming Manual for further details.
3.2.3 Initial Register Values
When the CPU is reset, the program counter (PC) is loaded from the vector table and the interrupt
mask bit (I) in the CCR is set to â1.â The other CCR bits and the general registers are not
initialized.
In particular, the stack pointer (R7) is not initialized. To prevent program crashes the stack pointer
should be initialized by software, by the first instruction executed after a reset.
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