M37517F8HP Datasheet, PDF (63/98 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

7517 Group
Software Commands (CPU Rewrite Mode)
Table 12 lists the software commands.
After setting the CPU Rewrite Mode Select Bit of the flash memory
control register to “1”, execute a software command to specify an
erase or program operation.
Each software command is explained below.
qRead Array Command (FF16)
The read array mode is entered by writing the command code
“FF16” in the first bus cycle. When an address to be read is input
in one of the bus cycles that follow, the contents of the specified
address are read out at the data bus (D0 to D7).
The read array mode is retained intact until another command is
written.
qRead Status Register Command (7016)
The read status register mode is entered by writing the command
code “7016” in the first bus cycle. The contents of the status regis-
ter are read out at the data bus (D0 to D7) by a read in the second
bus cycle.
The status register is explained in the next section.
qClear Status Register Command (5016)
This command is used to clear the bits SR1, SR4, and SR5 of the
status register after they have been set. These bits indicate that
operation has ended in an error. To use this command, write the
command code “5016” in the first bus cycle.
qProgram Command (4016)
Program operation starts when the command code “4016” is writ-
ten in the first bus cycle. Then, if the address and data to program
are written in the 2nd bus cycle, program operation (data program-
ming and verification) will start.
Whether the write operation is completed can be confirmed by
_____
reading the status register or the RY/BY Status Flag of the flash
memory control register. When the program starts, the read status
register mode is entered automatically and the contents of the sta-
tus register is read at the data bus (D0 to D7). The status register
bit 7 (SR7) is set to “0” at the same time the write operation starts
and is returned to “1” upon completion of the write operation. In
this case, the read status register mode remains active until the
next command is written.
____
The RY/BY Status Flag is “0” (busy) during write operation and “1”
(ready) when the write operation is completed as is the status reg-
ister bit 7.
At program end, program results can be checked by reading bit 4
(SR4) of the status register.
Start
Write 4016
Write ^{Write address}
Write data
Status register
read
SR7 = 1 ?
or
NO
RY/BY = 1 ?
YES
SR4 = 0 ?
NO
YES
Program completed
(Read array command
“FF16” write)
Program
error
Table 12 List of software commands (CPU rewrite mode)
Fig. 67 Program flowchart
Command
Cycle number
Mode
First bus cycle
Address
Data
(D0 to D7)
Read array
1
Write X ^{(Note 4)}
FF16
Read status register
Clear status register
2
Write
X
7016
1
Write
X
5016
Program
2
Write
X
4016
Erase all blocks
2
Write
X
2016
Block erase
2
Write
X
2016
Notes 1: SRD = Status Register Data
2: WA = Write Address, WD = Write Data
3: BA = Block Address to be erased (Input the maximum address of each block.)
4: X denotes a given address in the User ROM area .
Second bus cycle
Mode Address
Data
(D0 to D7)
Read
X
SRD ^{(Note 1)}
Write
Write
Write
WA ^{(Note 2)} WD ^{(Note 2)}
X
2016
BA ^{(Note 3)}
D016
Rev.1.01 Aug 02, 2004 page 63 of 96