M37517F8HP Datasheet, PDF (50/98 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

7517 Group
CLOCK GENERATING CIRCUIT
The 7517 group has four built-in oscillation circuits: high-speed
on-chip oscillation circuit, an oscillation circuit can be formed by
connecting a resonator between XIN and XOUT, resonator between
XCIN and XCOUT, and a 32 kHz RC oscillation circuit can be formed
by connecting capacitor and resistor. The oscillation source (high-
speed on-chip oscillation or XIN-XOUT oscillation) can be
controlled by setting the clock source switch bit (CPU mode regis-
ter) and high-speed on-chip oscillation stop bit (MISRG2) and XIN
switching inhibit bit (MISRG2). Immediately after power on, only
the high-speed on-chip oscillation circuit starts oscillation. In case
of using XIN-XOUT oscillation circuit, change the clock source
switch bit after start the XIN-XOUT oscillation setting the main clock
(XIN-XOUT) stop bit (CPU mode register).
When not using XIN-XOUT oscillation circuit, XIN pin and XOUT pin
must be open.
Setting the XIN switching inhibit bit “1” (disable switch to XIN), the
clock source switch bit become invalid, and XIN-XOUT oscillation
circuit becomes disabled since. When this bit is set to “1”, it can-
not be rewritten to “0” by program.
Setting the port Xc switch bit (CPU mode register) “1”, 32 kHz RC
oscillation circuit or XCIN-XCOUT oscillation circuit starts oscilla-
tion. The selection of 32 kHz RC oscillation circuit or XcIN-XCOUT
oscillation circuit is selected by 32 kHz RC oscillation enable bit
(MISRG2).
In case of using external resonator, connect resonator to XIN pin
and XOUT pin (XCIN pin and XCOUT pin). Use the circuit constants
in accordance with the resonator manufacturer’s recommended
values. No external resistor is needed between XIN and XOUT
since a feed-back resistor exists on-chip. However, an external
feed-back resistor is needed between XCIN and XCOUT.
Immediately after power on, XCIN and XCOUT pins function as I/O
ports.
Frequency Control
(1) Middle-speed mode
The internal clock φ is the frequency of high-speed on-chip oscilla-
tion clock or XIN divided by 8. After reset, this mode is selected.
(2) High-speed mode
The internal clock φ is half the frequency of high-speed on-chip
oscillation clock or XIN.
(3) Low-speed mode
The internal clock φ is half the frequency of XCIN.
sNote
If you switch the mode between middle/high-speed and low-
speed, stabilize both XIN and XCIN oscillations. The sufficient time
is required for the sub-clock to stabilize, especially immediately af-
ter power on and at returning from the stop mode. When switching
the mode between middle/high-speed and low-speed, set the fre-
quency on condition that f(XIN) > 3•f(XCIN).
(4) Low power dissipation mode
The low power consumption operation can be realized by stopping
the main clock XIN or high-speed on-chip oscillation in low-speed
mode. To stop the main clock, set the main clock stop bit (bit 5 of
CPU mode register) or the high-speed on-chip oscillation stop bit
(bit 2 of MISRG2) to “1”. When the main clock XIN is restarted (by
setting the main clock stop bit to “0”), set sufficient time for oscilla-
tion to stabilize.
The sub-clock XCIN-XCOUT oscillating circuit can not directly input
clocks that are generated externally. Accordingly, make sure to
cause an external resonator to oscillate.
32kHz RC oscillation circuit
Setting the port Xc switch bit “1” after setting the 32 kHz RC oscil-
lation enable bit “1”, the built-in 32 kHz RC oscillation circuit starts
oscillation. In case of using 32 kHz RC oscillation circuit, connect
82 kΩ resistor between XCIN-XCOUT, and connect 120 pF capaci-
tor between XCIN and GND.
Setting appropriate value to the 32 kHz oscillation circuit control
registers 0,1 it is possible to adjust the frequency error cause by
evenness of resistor and capacitor value .
The resistor ladder divided by 512 adjusts the frequency, and it
makes possible about 50 Hz step adjustment.
The theoretical frequency is calculated as follow.
f32CR=
1
2CRln(1+2R1/R2)
Rev.1.01 Aug 02, 2004 page 50 of 96