H8S2112R Datasheet, PDF (614/984 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family / H8S/2100 Series

Section 20 LPC Interface (LPC)
Bit Bit Name
4 FGA20E
3 SDWNE
Initial
Value
0
0
R/W
Slave Host Description
R/W  Fast Gate A20 Function Enable
Enables or disables the fast Gate A20 function. When
the fast Gate A20 is disabled, the normal Gate A20
can be implemented by firmware controlling P81
output.
0: Fast Gate A20 function disabled
Other function (input/output) of pin P81 is enabled
The internal state of GA20 output is initialized to 1
1: Fast Gate A20 function enabled
GA20 pin output is open-drain (external pull-up
resistor (Vcc) required)
R/W  LPC Software Shutdown Enable
Controls LPC interface shutdown. For details of the
LPC shutdown function, and the scope of initialization
by an LPC reset and an LPC shutdown, see section
20.4.4, LPC Interface Shutdown Function (LPCPD).
0: Normal state, LPC software shutdown setting
enabled
[Clearing conditions]
• Writing 0
• LPC hardware reset or LPC software reset
• LPC hardware shutdown release (rising edge of
LPCPD signal)
1: LPC hardware shutdown state setting enabled
Hardware shutdown state when LPCPD signal is
low level
[Setting condition]
Writing 1 after reading SDWNE = 0
Rev. 1.00 May 09, 2008 Page 588 of 954
REJ09B0462-0100