PD178004A_15 Datasheet, PDF (5/58 Pages) Renesas Technology Corp – PD178004A_15

µPD178004A, 178006A, 178016A, 178018A
OUTLINE OF FUNCTION
Product name
Item
Internal
memory
ROM (ROM configuration)
High-speed RAM
Buffer RAM
Expansion RAM
General-purpose register
Instruction cycle
Instruction set
I/O port
A/D converter
Serial interface
Timer
Buzzer (BEEP) output
Vectored
interrupt
Source
Maskable
Non-maskable
Software
Test input
µPD178004A
µPD178006A
µPD178016A
(1/2)
µPD178018A
32 Kbytes
(mask ROM)
48 Kbytes
(mask ROM)
60 Kbytes
(mask ROM)
1 024 bytes
32 bytes
Not provided
2 048 bytes
8 bits × 32 registers (8 bits × 8 registers × 4 banks)
With variable instruction execution time function
0.44 µs/0.88 µs/1.78 µs/3.56 µs/7.11 µs/14.22 µs (with 4.5-MHz crystal resonator)
• 16-bit operation
• Multiplication/division (8 bits × 8 bits, 16 bits ÷ 8 bits)
• Bit manipulation (set, reset, test, Boolean operation)
• BCD adjustment, etc.
Total
: 62 pins
CMOS input
: 1 pin
CMOS I/O
: 54 pins
N-ch open-drain I/O : 4 pins
N-ch open-drain output : 3 pins
8-bit resolution × 6 channels
• 3-wire/SBI/2-wire/I²C bus ^Note mode selectable
: 1 channel
• 3-wire serial I/O mode
(with automatic transfer/receive function of up to 32 byte) : 1 channel
• Basic timer (timer carry FF (10 Hz)) : 1 channel
• 8-bit timer/event counter
: 2 channels
• 8-bit timer (D/A converter: PWM output) : 1 channel
• Watchdog timer
: 1 channel
1.5 kHz, 3 kHz, 6 kHz
Internal: 8, external: 7
Internal: 1
Internal: 1
Internal: 1
Note When using the I²C bus mode (including when this mode is implemented by program without using the
peripheral hardware), consult your local NEC sales representative when you place an order for mask.
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