PD178004A_15 Datasheet, PDF (37/58 Pages) Renesas Technology Corp – PD178004A_15

µPD178004A, 178006A, 178016A, 178018A
(2) SERIAL INTERFACE (TA = –40 to +85 °C, VDD = 3.5 to 5.5 V)
(a) Serial interface channel 0
(i) 3-wire serial I/O mode (SCK0 ... internal clock output)
Parameter
Symbol
Test Conditions
SCK0 cycle time
tKCY1
4.5 V ≤ VDD ≤ 5.5 V
3.5 V ≤ VDD < 4.5 V
SCK0 high-/low-level width
tKH1,
4.5 V ≤ VDD ≤ 5.5 V
tKL1
3.5 V ≤ VDD < 4.5 V
SI0 setup time (to SCK0↑)
tSIK1
4.5 V ≤ VDD ≤ 5.5 V
3.5 V ≤ VDD < 4.5 V
SI0 hold time (from SCK0↑)
SO0 output delay time from SCK0↓
tKSI1
tKSO1
C = 100 pF ^Note
Note C is the load capacitance of SO0 output line.
MIN.
TYP.
MAX.
Unit
800
ns
1 600
ns
tKCY1/2 – 50
ns
tKCY1/2 – 100
ns
100
ns
150
ns
400
ns
300
ns
(ii) 3-wire serial I/O mode (SCK0 ... external clock input)
Parameter
Symbol
Test Conditions
SCK0 cycle time
tKCY2
4.5 V ≤ VDD ≤ 5.5 V
3.5 V ≤ VDD < 4.5 V
SCK0 high-/low-level width
tKH2,
4.5 V ≤ VDD ≤ 5.5 V
tKL2
3.5 V ≤ VDD < 4.5 V
SI0 setup time (to SCK0↑)
tSIK2
SI0 hold time (from SCK0↑)
tKSI2
SO0 output delay time from SCK0↓ tKSO2 C = 100 pF ^Note
SCK0 at rising or falling edge time tR2, tF2
MIN.
800
1 600
400
800
100
400
Note C is the load capacitance of SO0 output line.
TYP. MAX.
Unit
ns
ns
ns
ns
ns
ns
300
ns
1 000
ns
35