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PD178004A_15 Datasheet, PDF (42/58 Pages) Renesas Technology Corp – PD178004A_15
µPD178004A, 178006A, 178016A, 178018A
(iii) 3-wire serial I/O mode with automatic transmit/receive function (SCK1 ... internal clock
output)
Parameter
SCK1 cycle time
Symbol
tKCY11
SCK1 high/low-level width
SI1 setup time (to SCK1↑)
tKH11,
tKL11
tSIK11
SI1 hold time (from SCK1↑)
SO1 output delay time (from SCK1↓)
STB↑ from SCK1↑
Strobe signal high-level width
Busy signal setup time
(to busy signal detection timing)
Busy signal hold time
(from busy signal detection timing)
tKSI11
tKSO11
tSBD
tSBW
tBYS
tBYH
SCK1↓ from busy inactive
tSPS
Test Conditions
4.5 V ≤ VDD ≤ 5.5 V
3.5 V ≤ VDD < 4.5 V
4.5 V ≤ VDD ≤ 5.5 V
3.5 V ≤ VDD < 4.5 V
4.5 V ≤ VDD ≤ 5.5 V
3.5 V ≤ VDD < 4.5 V
C = 100 pF Note
4.5 V ≤ VDD ≤ 5.5 V
3.5 V ≤ VDD < 4.5 V
MIN.
800
1 600
tKCY11/2 – 50
tKCY11/2 – 100
100
150
400
tKCY11/2 – 100
tKCY11/ – 30
100
TYP.
MAX.
300
tKCY11/2 + 100
tKCY11 + 30
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
100
ns
150
ns
2tKCY11
ns
Note C is the load capacitance of SO1 output line.
(iv) 3-wire serial I/O mode with automatic transmit/receive function (SCK1 ... external clock
input)
Parameter
Symbol
Test Conditions
SCK1 cycle time
tKCY12 4.5 V ≤ VDD ≤ 5.5 V
3.5 V ≤ VDD < 4.5 V
SCK1 high/low-level width
tKH12,
tKL12
4.5 V ≤ VDD ≤ 5.5 V
3.5 V ≤ VDD < 4.5 V
SI1 setup time (to SCK1↑)
tSIK12
SI1 hold time (from SCK1↑)
tKSI12
SO1 output delay time (from SCK1↓) tKSO12 C = 100 pF Note
SCK1 at rising or falling edge time tR12, tF12
MIN.
TYP. MAX.
Unit
800
ns
1 600
ns
400
ns
800
ns
100
ns
400
ns
300
ns
1 000
ns
Note C is the load capacitance of SO1 output line.
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