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PD178004A_15 Datasheet, PDF (36/58 Pages) Renesas Technology Corp – PD178004A_15
µPD178004A, 178006A, 178016A, 178018A
AC CHARACTERISTICS
(1) BASIC OPERATION (TA = –40 to +85 °C, VDD = 3.5 to 5.5 V)
Parameter
Symbol
Test Conditions
Cycle time
TCY fXX = fX/2 Note 1, fX = 4.5 MHz operation
(Minimum instruction
execution time)
fXX = fX Note 2,
fX = 4.5 MHz operation
4.5 ≤ VDD ≤ 5.5 V
3.5 ≤ VDD < 4.5 V
TI1, TI2 input
frequency
fTI
4.5 ≤ VDD ≤ 5.5 V
3.5 V ≤ VDD ≤ 4.5 V
TI1, TI2 input high/ tTIH, 4.5 ≤ VDD ≤ 5.5 V
low-level width
tTIL
3.5 V ≤ VDD ≤ 4.5 V
Interrupt input high/
low-level width
TINTH,
TINTL
INTP0
INTP1 to INTP6
RESET low level
tRSL
width
MIN. TYP.
0.89
0.44
0.89
0
0
111
1.8
8/fsam Note 3
10
10
MAX.
14.22
7.11
7.11
4.5
275
Unit
µs
µs
µs
MHz
kHz
ns
µs
µs
µs
µs
Notes
1. When oscillation mode selection (OSMS) register is set at 00H.
2. When OSMS is set at 01H.
3. In combination with bits 0 (SCS0) and 1 (SCS1) of sampling clock select register (SCS), selection
of fsam is possible between fXX/2N, fXX/32, fXX/64 and fXX/128 (when N = 0 to 4).
Remarks 1. fXX: System clock frequency (fX or fX/2)
2. fX: System clock oscillation frequency
TCY vs VDD (At FXX = FX/2 system clock operation)
TCY vs VDD (At FXX = FX system clock operation)
60
60
10
Operation
Guaranteed
Range
2.0
1.0
0.5
0.4
0
1
2
3
4
56
Power Supply Voltage VDD [V]
10
2.0
Operation
Guaranteed
Range
1.0
0.5
0.4
0
1
2
3
4
56
Power Supply Voltage VDD [V]
34