R01AN1504EJ0100 Datasheet, PDF (33/50 Pages) Renesas Technology Corp – Using the DTC to Perform Continuous Clock

RL78/G14
4.8.9 CSI00 Transfer End Interrupt
Figure 4.13 shows the CSI00 transfer end interrupt.
Using the DTC to Perform Continuous Clock
Synchronous Serial Communication
r_csi00_interrupt
Retrieve the overrun error
detection flag
err_type ← (SSR00 & 0001H)
Set the clear trigger of the
overrun error flag
SIR00 register ← err_typ
OVCT00 bit = 1: Clears the OVF00 bit of the SSR00 register to 0
No
Overrun error occurs?
Yes
CSI00 error callback function
r_csi00_callback_error()
No
Transmit data counter
is less than 0?
Yes
Clear the transmit data counter
Transmit data counter ^No
is equal to 0?
Yes
Store the receive data
*(gp_csi00_rx_address+TX_RX_DATA_SIZE−1)
← SIO00 register
CSI00 receive end callback function
r_csi00_callback_receiveend()
return (status)
Figure 4.13 CSI00 Transfer End Interrupt
R01AN1504EJ0100 Rev. 1.00
Feb. 14, 2014
Page 33 of 47