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R01AN1504EJ0100 Datasheet, PDF (19/50 Pages) Renesas Technology Corp – Using the DTC to Perform Continuous Clock
RL78/G14
4.8.6 CSI00 Initialization
Figure 4.10 shows the CSI00 initialization.
Using the DTC to Perform Continuous Clock
Synchronous Serial Communication
R_CSI00_Create
Stop CSI00 communication operation
Disable the CSI00 interrupt
Set the CSI00 interrupt priority level
Clear the CSI00 error flag
Set the CSI00 operating mode
Set the CSI00 communication format
Set the baud rate
Set the output values of
pins SCK00 and SO00
Enable the CSI00 output
Set the pin used by CSI00
ST0 register
ST00 bit ← 1
MK0H register
CSIMK00 bit ← 1: Interrupt servicing disabled
IF0H register
CSIIF00 bit ← 0: No interrupt request signal is generated
PR10H register
CSIPR100 bit ← 1
PR00H register
CSIPR000 bit ← 1: Interrupt priority level 3 (low priority)
SIR00 register ← 0007H
FECT00 bit = 1: Framing error flag clear
PECT00 bit = 1: Parity error flag clear
OVCT00 bit = 1: Overrun error flag clear
SMR00 register ← 0020H
CKS00 bit = 0: Operation clock: CK00 (2 MHz = 32 MHz/24)
CCS00 bit = 0: Operation clock: Divided clock frequency of the operating clock
Bits MD002 and MD001 = 00B: CSI mode
MD000 bit = 0: Interrupt source: transfer end interrupt
SCR00 register ← C007H
Bits TXE00 and RXE00 = 11B: Transmission/reception
Bits DAP00 and CKP00 = 00B: Data and clock phase: Type 1
DIR00 bit = 0: MSB first
Bits DLS001 and DLS000 = 11B: 8-bit data length
SDR00 register ← CE00H: Transfer clock set by dividing the operating clock: fMCK/208
9615bps = 2 MHz ÷ 208
SO0 register
CKO00 ← 1: Serial clock output value: 1
SO00 bit ← 0: Serial data output value: 0
SOE0 register
SOE00 bit ← 1
PM5 register
PM50 bit ← 1: SI00 pin: Input mode
P5 register
P51 ← 1: SO00 pin: Output 1
PM5 register
PM51 bit ← 0: SO00 pin: Output mode
P3 register
P30 ← 1: SCK00 pin: Output 1
PM3 register
PM30 bit ← 0: SCK00 pin: Output mode
return
Figure 4.10 CSI00 Initialization
R01AN1504EJ0100 Rev. 1.00
Feb. 14, 2014
Page 19 of 47