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R01AN1504EJ0100 Datasheet, PDF (28/50 Pages) Renesas Technology Corp – Using the DTC to Perform Continuous Clock
RL78/G14
4.8.7 CSI00 Operation Start
Figure 4.11 shows the CSI00 operation start.
R_CSI00_Start
Enable the CSI00 interrupt
Set the output values of pins
SCK00 and SO00
Enable to output from CSI00
Enable to start the CSI00
communication operation
Using the DTC to Perform Continuous Clock
Synchronous Serial Communication
IF0H register
CSIIF00 bit ← 0: No interrupt request signal is generated
MK0H register
CSIMK00 bit ← 0: Interrupt servicing enabled
SO0 register
CKO00 bit ← 1: Serial clock output value is "1"
SO00 bit ← 0: Serial data output value is "0"
SOE0 register
SOE000 bit ← 1
SS0 register
SS00 bit ← 1
return
Figure 4.11 CSI00 Operation Start
Enabling the CSI00 interrupt
• Interrupt request flag register (IF0H)
Symbol
7
6
5
4
IF0H
SREIF0 SRIF0
STIF0
0
TMIF01H CSIIF01 CSIIF00
IICIF01 IICIF00
Value
×
×
0
‒
3
2
1
0
0
SREIF2 SRIF2
STIF2
TMIF11H CSIIF21 CSIIF20
IICIF21 IICIF20
‒
×
×
×
• Bit 5
CSIIF00
bit
0
1
Interrupt request flag
No interrupt request signal is generated
Interrupt request signal is generated, interrupt request status
For details on register setting, refer to the RL78/G14 User’s Manual: Hardware.
Legend symbol:
×: Unused bit; blank cell: unchanged bit; ‒: reserved bit or unallocated bit
R01AN1504EJ0100 Rev. 1.00
Feb. 14, 2014
Page 28 of 47