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R01AN1504EJ0100 Datasheet, PDF (25/50 Pages) Renesas Technology Corp – Using the DTC to Perform Continuous Clock | |||
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RL78/G14
Using the DTC to Perform Continuous Clock
Synchronous Serial Communication
Setting the baud rate
⢠Serial data register 00 (SDR00)
Sets the transfer clock to 9600 bps (9600 bps = fMCK ÷ 208 = 2 MHz ÷ 208)
Symbol 15 14 13 12 11 10 9 8 7 6 5 4 3
2
1
0
SDR00
â â â â â â ââââââ â
â
â
â
Value
1 1 0 0 1 1 1â
⢠Bits 15 to 9
SDR00[15:9]
0000000
0000001
â¦â¦â¦â¦â¦â¦â¦
1100111
Transfer clock set by dividing the operating
clock (fMCK)
fMCK/2
fMCK/4
â¦
fMCK/208 (=fMCK/[(103+1) Ã 2])
Setting the output values from pins SCK00 and SO00
⢠Serial output register 0 (SO0)
Symbol
SO0
Value
15 14 13 12 11 10
9
8 7654 3
2
1
0
0 0 0 0 CKO03 CKO02 CKO01 CKO00 0 0 0 0 SO03 SO02 SO01 SO00
ââââ Ã
Ã
Ã
1 ââââ Ã
Ã
Ã
⢠Bit 8
CKO00
bit
0
1
Serial clock output of channel 0
Serial clock output value is â0â
Serial clock output value is â1â
⢠Serial output register 0 (SO0)
Symbol
SO0
Value
15 14 13 12 11 10
9
8 7654 3
2
1
0
0 0 0 0 CKO03 CKO02 CKO01 CKO00 0 0 0 0 SO03 SO02 SO01 SO00
ââââ Ã
Ã
Ã
ââââ Ã
Ã
Ã
0
⢠Bit 0
SO00 bit
0
1
Serial data output of channel 0
Serial clock output value is â0â
Serial clock output value is â1â
For details on register setting, refer to the RL78/G14 Userâs Manual: Hardware.
Legend symbol:
Ã: Unused bit; blank cell: unchanged bit; â: reserved bit or unallocated bit
R01AN1504EJ0100 Rev. 1.00
Feb. 14, 2014
Page 25 of 47
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