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HYB18T512400B2C Datasheet, PDF (57/69 Pages) Qimonda AG – 512-Mbit Double-Data-Rate-Two SDRAM
Internet Data Sheet
HY[B/I]18T512[40/80/16]0B2[C/F](L)
512-Mbit Double-Data-Rate-Two SDRAM
7.3
Jitter Definition and Clock Jitter Specification
Generally, jitter is defined as “the short-term variation of a signal with respect to its ideal position in time”. The following table
provides an overview of the terminology.
Symbol
tCK.AVG
TABLE 49
Average Clock and Jitter Symbols and Definition
Parameter
Description
Units
Average clock period tCK.AVG is calculated as the average clock period within any consecutive ps
200-cycle window:
tJIT.PER
tJIT(PER, LCK)
tJIT.CC
tJIT(CC, LCK)
tERR.2PER
tCK.AVG
=
N-1--
⎛
.⎜
⎜
N
∑
⎞
tCKj⎟⎟
(1)
⎝j = 1
⎠
Clock-period jitter
N = 200
tJIT.PER is defined as the largest deviation of any single tCK from tCK.AVG: ps
tJIT.PER = Min/Max of {tCKi – tCK.AVG} where i = 1 to 200
Clock-period jitter
during DLL-locking
period
Cycle-to-cycle clock
period jitter
tJIT.PER defines the single-period jitter when the DLL is already locked.
tJIT.PER is not guaranteed through final production testing.
tJIT(PER,LCK) uses the same definition as tJIT.PER, during the DLL-locking ps
period only.
tJIT(PER,LCK) is not guaranteed through final production testing.
tJIT.CC is defined as the absolute difference in clock period between two ps
consecutive clock cycles:
tJIT.CC = Max of ABS{tCKi+1 – tCKi}
Cycle-to-cycle clock
period jitter during
DLL-locking period
Cumulative error
across 2 cycles
tJIT.CC defines the cycle- to- cycle jitter when the DLL is already locked.
tJIT.CC is not guaranteed through final production testing.
tJIT(CC,LCK) uses the same definition as tJIT.CC during the DLL-locking ps
period only.
tJIT(CC,LCK) is not guaranteed through final production testing.
tERR.2PER is defined as the cumulative error across 2 consecutive cycles ps
from tCK.AVG:
⎛i + n – 1
⎞
tERR(2per)
=
⎜
⎜
∑
tCKj⎟⎟ – n × tCK(avg)
(2)
⎝ j=i
⎠
n = 2 for tERR(2per)
where i = 1 to 200
Rev. 1.12, 2007-05
57
10062006-YPTZ-CDR7