HYB18T512400B2C Datasheet, PDF (31/69 Pages) Qimonda AG – 512-Mbit Double-Data-Rate-Two SDRAM

Internet Data Sheet
HY[B/I]18T512[40/80/16]0B2[C/F](L)
512-Mbit Double-Data-Rate-Two SDRAM
TABLE 27
Single-ended AC Input Test Conditions
Symbol
Condition
Value
Unit
Note
V_REF
V_SWING.MAX
SLEW
Input reference voltage
Input signal maximum peak to peak swing
Input signal minimum Slew Rate
0.5 x V_DDQ
1.0
1.0
V
1)
V
1)
V / ns
2)3)
1) Input waveform timing is referenced to the input signal crossing through the V_REF level applied to the device under test.
2) The input signal minimum Slew Rate is to be maintained over the range from V_IH(ac).MIN to V_REF for rising edges and the range from V_REF to
V_IL(ac).MAX for falling edges as shown in Figure 4
3) AC timings are referenced with input waveforms switching from V_IL(ac) to V_IH(ac) on the positive transitions and V_IH(ac) to V_IL(ac) on the negative
transitions.
96:,1*0$;
'HOWD7)
)DOOLQJ6OHZ
95()9,/DFPD[
'HOWD7)
FIGURE 4
Single-ended AC Input Test Conditions Diagram
'HOWD75
9''4
9,+DFPLQ
9,+GFPLQ
95()
9,/GFPD[
9,/DFPD[
966
5LVLQJ6OHZ
9,+DFPLQ95()
'HOWD75
03(7
Rev. 1.12, 2007-05
31
10062006-YPTZ-CDR7