HYB18T512400B2C Datasheet, PDF (24/69 Pages) Qimonda AG – 512-Mbit Double-Data-Rate-Two SDRAM

Internet Data Sheet
HY[B/I]18T512[40/80/16]0B2[C/F](L)
512-Mbit Double-Data-Rate-Two SDRAM
Input Pin
×4 Components
DQ[3:0]
DQS
DQS
DM
×8 Components
DQ[7:0]
DQS
DQS
RDQS
RDQS
DM
×16 Components
DQ[7:0]
DQ[15:8]
LDQS
LDQS
UDQS
UDQS
LDM
UDM
EMRS(1) Address Bit A10
X
X
0
X
X
X
0
X
0
X
X
X
X
0
X
0
X
X
Note: X = don’t care; 0 = bit set to low; 1 = bit set to high
TABLE 15
ODT Truth Table
EMRS(1) Address Bit A11
X
X
1
1
0
X
X
Rev. 1.12, 2007-05
24
10062006-YPTZ-CDR7