HYB18T512400B2C Datasheet, PDF (18/69 Pages) Qimonda AG – 512-Mbit Double-Data-Rate-Two SDRAM

Internet Data Sheet
HY[B/I]18T512[40/80/16]0B2[C/F](L)
512-Mbit Double-Data-Rate-Two SDRAM
2.2
512 Mbit DDR2 Addressing
This chapter contents the table for the 512 Mbit DDR2 Addressing.
Configuration
Bank Address
Number of Banks
Auto-Precharge
Row Address
Column Address
Number of Column Address Bits
Number of I/Os
Page Size [Bytes]
1) Refered to as ’org’
2) Refered to as ’colbits’
3) PageSize = 2^colbits × org/8 [Bytes]
128Mb x 4¹⁾
BA[1:0]
4
A10 / AP
A[13:0]
A11, A[9:0]
11
4
1024 (1K)
64Mb x 8¹⁾
BA[1:0]
4
A10 / AP
A[13:0]
A[9:0]
10
8
1024 (1K)
TABLE 10
512-Mbit DDR2 Addressing
32Mb x 16¹⁾
Note
BA[1:0]
4
A10 / AP
A[12:0]
A[9:0]
10
2)
16
2048 (2K)
3)
Rev. 1.12, 2007-05
18
10062006-YPTZ-CDR7