XA-S3 Datasheet, PDF (9/52 Pages) NXP Semiconductors – XA 16-bit microcontroller 32 K/1 K OTP/ROM/ROMless, 8-channel 8-bit A/D, low voltage 2.7 V.5.5 V, I2C, 2 UARTs, 16 MB address range

Philips Semiconductors
XA 16-bit microcontroller
32 K/1 K OTP/ROM/ROMless, 8-channel 8-bit A/D, low voltage (2.7 V–5.5 V),
I²C, 2 UARTs, 16 MB address range
Preliminary specification
XA-S3
MNEMONIC
P5.0 – P5.7
P6.0 – P6.7
PIN NUMBER
PLCC
LQFP
23–30
17–20,
22–25
23
24
25
26
27
28
29
30
43, 44
17
18
19
20
22
23
24
25
40, 41
43
40
44
41
TYPE
I/O
I
I
I
I
I
I
I/O
I/O
I/O
O
O
NAME AND FUNCTION
Port 5: Port 5 is an 8-bit I/O port with a user-configurable output type. Port 5 latches have
1s written to them and are configured in the quasi-bidirectional mode during reset. The
operation of Port 5 pins as inputs and outputs depends upon the port configuration
selected. Each port pin is configured independently. Refer to the section on I/O port
configuration and the DC Electrical Characteristics for details.
Port 5 also provides various special functions as described below. Port 5 pins used as A/D
inputs must be configured by the user to the high impedance mode.
AD0 (P5.0):
A/D channel 0 input.
AD1 (P5.1):
A/D channel 1 input.
AD2 (P5.2):
A/D channel 2 input.
AD3 (P5.3):
A/D channel 3 input.
AD4 (P5.4):
A/D channel 4 input.
AD5 (P5.5):
AD6/SCL (P5.6):
AD7/SDA (P5.7):
A/D channel 5 input.
A/D channel 6 input. I²C serial clock input/output.
A/D channel 7 input. I²C serial data input/output.
Port 6: Port 6 is a 2-bit I/O port with a user-configurable output type. Port 6 latches have
1s written to them and are configured in the quasi-bidirectional mode during reset. The
operation of Port 6 pins as inputs and outputs depends upon the port configuration
selected. Each port pin is configured independently. Refer to the section on I/O port
configuration and the DC Electrical Characteristics for details.
Port 6 also provides special functions as described below:
A22 (P6.0):
A23 (P6.1):
Address bit 22 of the external address bus.
Address bit 23 of the external address bus.
Table 1. Special Function Registers
NAME
DESCRIPTION
SFR
Address
ADCON#* A/D control register
43E
ADCS#* A/D channel select register
43F
ADCFG# A/D timing configuration
4B9
ADRSH0# A/D high byte result, channel 0 4B0
ADRSH1# A/D high byte result, channel 1 4B1
ADRSH2# A/D high byte result, channel 2 4B2
ADRSH3# A/D high byte result, channel 3 4B3
ADRSH4# A/D high byte result, channel 4 4B4
ADRSH5# A/D high byte result, channel 5 4B5
ADRSH6# A/D high byte result, channel 6 4B6
ADRSH7# A/D high byte result, channel 7 4B7
ADRSL# Two LSBs of 10-bit A/D result
4B8
BCR#
Bus configuration register
46A
BTRH
Bus timing register high byte
469
BTRL
Bus timing register low byte
468
CCON#* PCA counter control
41A
CMOD# PCA mode control
490
CH#
PCA counter high byte
48B
CL#
PCA counter low byte
48A
CCAPM0# PCA module 0 mode
491
CCAPM1# PCA module 1 mode
492
MSB
3F7
–
3FF
ADCS7
–
–
DW1
WM1
2D7
CF
CIDL
–
–
BIT FUNCTIONS AND ADDRESSES
Reset
LSB Value
3F6
3F5
3F4
3F3
3F2
3F1
3F0
–
–
– ADRES ADMOD ADSST ADINT 00h
3FE 3FD 3FC 3FB 3FA 3F9 3F8
ADCS6 ADCS5 ADCS4 ADCS3 ADCS2 ADCS1 ADCS0 00h
–
–
–
A/D Timing Configuration
0Fh
xx
xx
xx
xx
xx
xx
xx
xx
xx
–
CLKD WAITD BUSD BC2 BC1 BC0 Note 1
DW0 DWA1 DWA0 DR1 DR0 DRA1 DRA0 FFh
WM0 ALEW
–
CR1 CR0 CRA1 CRA0 EFh
2D6 2D5 2D4 2D3 2D2 2D1 2D0
CR
–
CCF4 CCF3 CCF2 CCF1 CCF0 00h
WDTE
–
–
–
CPS1 CPS0 ECF 00h
00h
00h
ECOM0 CAPP0 CAPN0 MAT0 TOG0 PWM0 ECCF0 00h
ECOM1 CAPP1 CAPN1 MAT1 TOG1 PWM1 ECCF1 00h
2000 Dec 01
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