XA-S3 Datasheet, PDF (8/52 Pages) NXP Semiconductors – XA 16-bit microcontroller 32 K/1 K OTP/ROM/ROMless, 8-channel 8-bit A/D, low voltage 2.7 V.5.5 V, I2C, 2 UARTs, 16 MB address range

Philips Semiconductors
XA 16-bit microcontroller
32 K/1 K OTP/ROM/ROMless, 8-channel 8-bit A/D, low voltage (2.7 V–5.5 V),
I²C, 2 UARTs, 16 MB address range
Preliminary specification
XA-S3
MNEMONIC
P1.0 – P1.7
P2.0 – P2.7
P3.0 – P3.7
P4.0 – P4.7
PIN NUMBER
PLCC
LQFP
35–42 32–39
TYPE
I/O
35
32
O
36
33
O
37
34
O
38
35
O
39
36
I
40
37
O
41
38
I/O
42
39
O
59–66 58, 59, I/O
61–66
11–18
3–10
I/O
11
3
I
12
4
O
13
5
I
14
6
I
15
7
I/O
16
8
I/O
17
9
O
18
10
O
3–10 73–79, 2 I/O
3
73
I
4
74
I/O
5
75
I/O
6
76
I/O
7
77
I/O
8
78
I/O
9
79
O
10
2
O
NAME AND FUNCTION
Port 1: Port 1 is an 8-bit I/O port with a user-configurable output type. Port 1 latches have
1s written to them and are configured in the quasi-bidirectional mode during reset. The
operation of port 1 pins as inputs and outputs depends upon the port configuration
selected. Each port pin is configured independently. Refer to the section on I/O port
configuration and the DC Electrical Characteristics for details.
Port 1 also provides various special functions as described below:
A0/WRH (P1.0)
Address bit 0 of the external address bus when the eternal data
bus is configured for an 8-bit width. When the external data bus
is configured for a 16-bit width, this pin becomes the high byte
write strobe.
A1 (P1.1):
Address bit 1 of the external address bus.
A2 (P1.2):
Address bit 2 of the external address bus.
A3 (P1.3):
Address bit 3 of the external address bus.
RxD1 (P1.4):
Serial port 1 receiver input.
TxD1 (P1.5):
Serial port 1 transmitter output.
T2 (P1.6):
Timer/counter 2 external count input or overflow output.
T2EX (P1.7):
Timer/counter 2 reload/capture/direction control.
Port 2: Port 2 is an 8-bit I/O port with a user-configurable output type. Port 2 latches have
1s written to them and are configured in the quasi-bidirectional mode during reset. The
operation of port 2 pins as inputs and outputs depends upon the port configuration
selected. Each port pin is configured independently. Refer to the section on I/O port
configuration and the DC Electrical Characteristics for details.
When the external program/data bus is used in 16-bit mode, Port 2 becomes the
multiplexed high data/instruction byte and address lines 12 through 19. When the external
data/address bus is used in 8-bit mode, the number of address lines that appear on Port 2
is user programmable in groups of 4 bits.
Port 3: Port 3 is an 8-bit I/O port with a user-configurable output type. Port 3 latches have
1s written to them and are configured in the quasi-bidirectional mode during reset. The
operation of port 3 pins as inputs and outputs depends upon the port configuration
selected. Each port pin is configured independently. Refer to the section on I/O port
configuration and the DC Electrical Characteristics for details.
Port 3 also provides the various special functions as described below:
RxD0 (P3.0):
Receiver input for serial port 0.
TxD0 (P3.1):
Transmitter output for serial port 0.
INT0 (P3.2):
External interrupt 0 input.
INT1 (P3.3):
External interrupt 1 input.
T0 (P3.4):
Timer/counter 0 external count input or overflow output.
T1 / BUSW (P3.5):
Timer/counter 1 external count input or overflow output. The
value on this pin is latched as an external chip reset is
completed and defines the default external data bus width.
WRL (P3.6):
External data memory low byte write strobe.
RD (P3.7):
External data memory read strobe.
Port 4: Port 4 is an 8-bit I/O port with a user-configurable output type. Port 4 latches have
1s written to them and are configured in the quasi-bidirectional mode during reset. The
operation of Port 4 pins as inputs and outputs depends upon the port configuration
selected. Each port pin is configured independently. Refer to the section on I/O port
configuration and the DC Electrical Characteristics for details.
Port 4 also provides various special functions as described below:
ECI (P4.0):
CEX0 (P4.1):
PCA External clock input.
Capture/compare external I/O for PCA module 0.
CEX1 (P4.2):
Capture/compare external I/O for PCA module 1.
CEX2 (P4.3):
Capture/compare external I/O for PCA module 2.
CEX3 (P4.4):
Capture/compare external I/O for PCA module 3.
CEX4 (P4.5):
Capture/compare external I/O for PCA module 4.
A20 (P4.6):
A21 (P4.7):
Address bit 20 of the external address bus.
Address bit 21 of the external address bus.
2000 Dec 01
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