XA-S3 Datasheet, PDF (26/52 Pages) NXP Semiconductors – XA 16-bit microcontroller 32 K/1 K OTP/ROM/ROMless, 8-channel 8-bit A/D, low voltage 2.7 V.5.5 V, I2C, 2 UARTs, 16 MB address range

Philips Semiconductors
XA 16-bit microcontroller
32 K/1 K OTP/ROM/ROMless, 8-channel 8-bit A/D, low voltage (2.7 V–5.5 V),
I²C, 2 UARTs, 16 MB address range
Preliminary specification
XA-S3
WRITE TO
CCAP4H
RESET
WRITE TO
CCAP4L
0
1
ENABLE
CIDL
WDTE
––
––
CCAP4H
CCAP4L
MODULE 4
16–BIT COMPARATOR
MATCH
––
CPS1
CPS0
ECF
CMOD
(490H)
RESET
CH
CL
PCA TIMER/COUNTER
––
ECOMn CAPPn CAPNn MATn
TOGn
0
0
1
X
Figure 18. PCA Watchdog Timer m(Module 4 only)
PWMn
0
ECCFn
X
CCAPM4
(495H)
SU01313
PCA Watchdog Timer
An on-board watchdog timer is available with the PCA to improve
the reliability of the system without increasing chip count. Watchdog
timers are useful for systems that are susceptible to noise, power
glitches, or electrostatic discharge. Module 4 is the only PCA
module that can be programmed as a watchdog. However, this
module can still be used for other modes if the watchdog is not
needed.
Figure 18 shows a diagram of how the watchdog works. The user
pre-loads a 16-bit value in the compare registers. Just like the other
compare modes, this 16-bit value is compared to the PCA timer
value. If a match is allowed to occur, an internal reset will be
generated. This will not cause the RST pin to be driven low.
In order to hold off the reset, the user has three options:
1. periodically change the compare value so it will never match the
PCA timer,
2. periodically change the PCA timer value so it will never match
the compare values, or
3. disable the watchdog by clearing the WDTE bit before a match
occurs and then re-enable it.
The first two options are more reliable because the watchdog timer
is never disabled as in option #3. If the program counter ever goes
astray, a match will eventually occur and cause an internal reset.
The second option is also not recommended if other PCA modules
are being used. Remember, the PCA timer is the time base for all
modules; changing the time base for other modules would not be a
good idea. Thus, in most applications the first solution is the best
option.
Figure 19 shows the code for initializing the watchdog timer. Module
4 can be configured in either compare mode, and the WDTE bit in
CMOD must also be set. The user’s software then must periodically
change (CCAP4H,CCAP4L) to keep a match from occurring with the
PCA timer (CH,CL). This code is given in the WATCHDOG routine in
Figure 19.
This routine should not be part of an interrupt service routine,
because if the program counter goes astray and gets stuck in an
infinite loop, interrupts will still be serviced and the watchdog will
keep getting reset. Thus, the purpose of the watchdog would be
defeated. Instead, call this subroutine from the main program within
2¹⁶ count of the PCA timer.
2000 Dec 01
26