SAA7785 Datasheet, PDF (55/68 Pages) NXP Semiconductors – ThunderBird Avenger PCI Audio Accelerator

Philips Semiconductors
ThunderBird Avenger^TM PCI Audio
Accelerator
Preliminary Specification
SAA7785
Bit
7:0
Name
INTLINE
R/W
RO
Function
Interrupt Line. The Interrupt Line register is an eight bit register used to com-
municate interrupt line routing information. The value in this register tells
which input of the system interrupt controller(s) the SSA7785 ThunderBird
Avenger™ Device's interrupt pin is connected to. It is set to 00h to use func-
tion 0’s interrupt line. There is no legacy interrupt support for function 1.
TABLE 48 Interrupt Pin Register - INTPIN (RO)
PCI CFG 1
D7
D6
D5
D4
D3
D2
D1
D0
Offset 3Dh
INTPIN[7:0]
POR Value
0
0
0
0
0
0
0
0
Bit
7:0
Name
INTPIN
R/W
RO
Function
Interrupt Pin. The interrupt pin register tells which interrupt the SSA7785
ThunderBird Avenger™ device uses. The read only value of 00h implies that
the SSA7785 ThunderBird Avenger™ device shares the INT A interrupt pin
with function 0. There is no legacy interrupt support for function 1.
TABLE 49 MIN_GNT Register - MINGNT (RO)
PCI CFG 1
D7
D6
D5
D4
D3
D2
D1
D0
Offset 3Eh
MINGNT[7:0]
POR Value
0
0
0
0
0
0
0
0
Bit
7:0
Name
MINGNT
R/W
RO
Function
Minimum grant specifies how long of a burst period the device needs assum-
ing a clock speed of 33MHz. Since the SSA7785 ThunderBird Avenger™,
function 1, is a target only, this register is read only and set to zero.
TABLE 50 MAX_LAT Register - MAXLAT (RO)
PCI CFG 1
D7
D6
D5
D4
D3
D2
D1
D0
Offset 3Fh
MAXLAT[7:0]
POR Value
0
0
0
0
0
0
0
0
1999 Nov 12
55