80C554 Datasheet, PDF (53/76 Pages) NXP Semiconductors – 80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP

Philips Semiconductors
80C51 8-bit microcontroller – 6 clock operation
16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I²C, PWM,
capture/compare, high I/O, 64L LQFP
Preliminary specification
80C554/83C554/87C554
00D8
00D9
00DA
00DB
00A8
00B8
00DD
00BD
00D5
00C5
00C1
00E5
0031
00A0
0001
00C0
00C1
0018
0030
0038
0040
0048
0053
0052
0051
0050
!********************************************************************************************************
! SI01 EQUATE LIST
!********************************************************************************************************
!********************************************************************************************************
! LOCATIONS OF THE SI01 SPECIAL FUNCTION REGISTERS
!********************************************************************************************************
S1CON –0xd8
S1STA –0xd9
S1DAT –0xda
S1ADR –0xdb
IEN0
IP0
–0xa8
–02b8
!********************************************************************************************************
! BIT LOCATIONS
!********************************************************************************************************
STA
–0xdd
SI01HP –0xbd
! STA bit in S1CON
! IP0, SI01 Priority bit
!********************************************************************************************************
! IMMEDIATE DATA TO WRITE INTO REGISTER S1CON
!********************************************************************************************************
ENS1_NOTSTA_STO_NOTSI_AA_CR0
–0xd5
! Generates STOP
! (CR0 = 100 kHz)
ENS1_NOTSTA_NOTSTO_NOTSI_AA_CR0
–0xc5 ! Releases BUS and
! ACK
ENS1_NOTSTA_NOTSTO_NOTSI_NOTAA_CR0
–0xc1 ! Releases BUS and
! NOT ACK
ENS1_STA_NOTSTO_NOTSI_AA_CR0
–0xe5 ! Releases BUS and
! set STA
!********************************************************************************************************
! GENERAL IMMEDIATE DATA
!********************************************************************************************************
OWNSLA –0x31
! Own SLA+General Call
! must be written into S1ADR
ENSI01 –0xa0
! EA+ES1, enable SIO1 interrupt
! must be written into IEN0
PAG1
–0x01
! select PAG1 as HADD
SLAW –0xc0
! SLA+W to be transmitted
SLAR
–0xc1
! SLA+R to be transmitted
SELRB3 –0x18
! Select Register Bank 3
!********************************************************************************************************
! LOCATIONS IN DATA RAM
!********************************************************************************************************
MTD
–0x30
! MST/TRX/DATA base address
MRD
–0x38
! MST/REC/DATA base address
SRD
–0x40
! SLV/REC/DATA base address
STD
–0x48
! SLV/TRX/DATA base address
BACKUP
–0x53
NUMBYTMST –0x52
SLA
–0x51
HADD
–0x50
! Backup from NUMBYTMST
! To restore NUMBYTMST in case
! of an Arbitration Loss.
! Number of bytes to transmit
! or receive as MST.
! Contains SLA+R/W to be
! transmitted.
! High Address byte for STATE 0
! till STATE 25.
2000 Nov 10
53