80C554 Datasheet, PDF (41/76 Pages) NXP Semiconductors – 80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP

Philips Semiconductors
80C51 8-bit microcontroller – 6 clock operation
16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I²C, PWM,
capture/compare, high I/O, 64L LQFP
Preliminary specification
80C554/83C554/87C554
MR
SUCCESSFUL RECEPTION
ÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇ _{FROM A SLAVE TRANSMITTER}
S
SLA
R
A
DATA ^ÇÇA^{ÇÇÇÇÇÇ}DATA^{ÇÇÇÇ}A^{ÇÇÇÇ}P^{ÇÇÇÇ}
08H
NEXT TRANSFER STARTED WITH A
REPEATED START CONDITION
NOT ACKNOWLEDGE RECEIVED
AFTER THE SLAVE ADDRESS
40H
50H
A^{ÇÇÇÇ}P^ÇÇ
58H
ÇÇÇ_SÇÇÇÇÇÇ_SÇÇÇ_LA ÇÇÇÇÇÇ_R ÇÇÇ
10H _{ÇÇÇÇW ÇÇ}
ARBITRATION LOST IN SLAVE ADDRESS
OR ACKNOWLEDGE BIT
48H
A or A
OTHER MST
CONTINUES
TO MST/TRX MODE
ENTRY = MT
ÇÇÇÇÇÇÇÇÇ_A
OTHER MST
CONTINUES
38H
38H
ARBITRATION LOST AND ADDRESSED AS SLAVE
A
OTHER MST
CONTINUES
68H 78H 80H
TO CORRESPONDING
STATES IN SLAVE MODE
FROM MASTER TO SLAVE
ÇÇÇÇÇÇÇÇ _{FROM SLAVE TO MASTER}
ÇÇÇÇÇÇÇÇÇÇÇ _DATA
A
ANY NUMBER OF DATA BYTES AND THEIR ASSOCIATED ACKNOWLEDGE BITS
n
THIS NUMBER (CONTAINED IN S1STA) CORRESPONDS TO A DEFINED STATE OF THE I²C BUS. SEE TABLE 7.
Figure 41. Format and States in the Master Receiver Mode
SU00972
2000 Nov 10
41