80C554 Datasheet, PDF (47/76 Pages) NXP Semiconductors – 80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP

Philips Semiconductors
80C51 8-bit microcontroller – 6 clock operation
16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I²C, PWM,
capture/compare, high I/O, 64L LQFP
Preliminary specification
80C554/83C554/87C554
Table 8. Slave Receiver Mode (Continued)
STATUS
CODE
(S1STA)
STATUS OF THE
I²C BUS AND
SIO1 HARDWARE
APPLICATION SOFTWARE RESPONSE
TO S1CON
TO/FROM S1DAT
STA STO SI AA
NEXT ACTION TAKEN BY SIO1 HARDWARE
A0H A STOP condition or No STDAT action or 0
0
0 0 Switched to not addressed SLV mode; no recognition
repeated START
of own SLA or General call address
condition has been
No STDAT action or 0
0
0 1 Switched to not addressed SLV mode; Own SLA will
received while still
be recognized; General call address will be
addressed as
recognized if S1ADR.0 = logic 1
SLV/REC or SLV/TRX _{No STDAT action or 1}
0
0 0 Switched to not addressed SLV mode; no recognition
of own SLA or General call address. A START
condition will be transmitted when the bus becomes
free
No STDAT action
1
0
0 1 Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1. A START condition
will be transmitted when the bus becomes free.
Table 9. Slave Transmitter Mode
STATUS
CODE
(S1STA)
STATUS OF THE
I²C BUS AND
SIO1 HARDWARE
APPLICATION SOFTWARE RESPONSE
TO S1CON
TO/FROM S1DAT
STA STO SI AA
NEXT ACTION TAKEN BY SIO1 HARDWARE
A8H Own SLA+R has
Load data byte or
been received; ACK
has been returned
load data byte
X
0
0 0 Last data byte will be transmitted and ACK bit will be
received
X
0
0 1 Data byte will be transmitted; ACK will be received
B0H Arbitration lost in
Load data byte or
SLA+R/W as master;
Own SLA+R has
been received, ACK
has been returned
load data byte
X
0
0 0 Last data byte will be transmitted and ACK bit will be
received
X
0
0 1 Data byte will be transmitted; ACK bit will be received
B8H Data byte in S1DAT Load data byte or
has been transmitted;
ACK has been
received
load data byte
X
0
0 0 Last data byte will be transmitted and ACK bit will be
received
X
0
0 1 Data byte will be transmitted; ACK bit will be received
C0H Data byte in S1DAT No S1DAT action or 0
0
0 01 Switched to not addressed SLV mode; no recognition
has been transmitted;
of own SLA or General call address
NOT ACK has been _{no S1DAT action or 0}
0
0 1 Switched to not addressed SLV mode; Own SLA will
received
be recognized; General call address will be
recognized if S1ADR.0 = logic 1
no S1DAT action or 1
0
0 0 Switched to not addressed SLV mode; no recognition
of own SLA or General call address. A START
condition will be transmitted when the bus becomes
free
no S1DAT action
1
0
0 1 Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1. A START condition
will be transmitted when the bus becomes free.
C8H Last data byte in
No S1DAT action or 0
0
0 0 Switched to not addressed SLV mode; no recognition
S1DAT has been
of own SLA or General call address
transmitted (AA = 0); _{no S1DAT action or 0}
0
0 1 Switched to not addressed SLV mode; Own SLA will
ACK has been
be recognized; General call address will be
received
recognized if S1ADR.0 = logic 1
no S1DAT action or 1
0
0 0 Switched to not addressed SLV mode; no recognition
of own SLA or General call address. A START
condition will be transmitted when the bus becomes
free
no S1DAT action
1
0
0 1 Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1. A START condition
will be transmitted when the bus becomes free.
2000 Nov 10
47