UMA1002 Datasheet, PDF (30/36 Pages) NXP Semiconductors – Data processor for cellular radio DPROC2

Philips Semiconductors
Data processor for cellular radio
(DPROC2)
Product specification
UMA1002
AC CHARACTERISTICS
V_DD = 3 V (V_DDA and V_DDD externally connected); T_amb = −30 to +70 °C; f_CLKIN = 1.2 MHz (if CLKSEL = logic 0);
unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Data rate of data transfer link: RXCLK, RXLINE, TXCLK, TXLINE
t_data
data conversion rate
−
−
500 kbit/s
Clock input: CLKIN (CLKSEL = logic 0)
C_i
T_CLKIN
t_CLKINH
t_r
t_f
input capacitance
clock input period time
clock input HIGH time
clock input rise time
clock input fall time
−
5
−
pF
833.25 833.33 833.42 ns
40
50
60
%T_CLKIN
−
50
−
ns
−
50
−
ns
Clock input: CLKIN (CLKSEL = logic 1)
T_CLKIN
t_CLKINH
t_r
t_f
clock input period time
clock input HIGH time
clock input rise time
clock input fall time
−
104.17 −
ns
40
50
60
%T_CLKIN
−
5
−
ns
−
5
−
ns
Analog output: DATA
V_DATA
V_o(p-p)
THD
DC output voltage level
output voltage level for signalling tone
(peak-to-peak value)
total harmonic distortion for
Supervisory Audio Tone (SAT)
V_DD = 3 V; note 1
V_DD = 5 V; note 1
−
V_AGND −
V
1.14 1.2 1.26 V
1.9 2.0 2.1 V
−
−
10
%
R_L
allowed load resistance to AC ground
C_L
allowed load capacitance to AC ground
10
−
−
−
−
kΩ
100 pF
Analog input: DEMODD
V_DEMODD DC input voltage level
100 kΩ resistor external to −
V_AGND −
V
AGND
V_i(p-p)
data input voltage level
(peak-to-peak value)
input via a 10 nF capacitor 200 250 600 mV
V_i(p-p)
SAT input voltage level
(peak-to-peak value)
50
−
−
mV
Z_i
input impedance
1
−
−
MΩ
Note
1. Plus supply voltage variation (∆V_DD), R_L = 10 kΩ.
1997 Jan 28
30