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XA-H4 Datasheet, PDF (17/42 Pages) NXP Semiconductors – Single-chip 16-bit microcontroller
Philips Semiconductors
Single-chip 16-bit microcontroller
Preliminary specification
XA-H4
MMR Name
Data FIFO Register Ch.0 Tx
DMA Control Register Ch.1 Tx
FIFO Control & Status Register Ch.1 Tx
Segment Register Ch.1 Tx
Buffer Base Register Ch.1 Tx
Buffer Bound Register Ch.1 Tx
Address Pointer Reg Ch.1 Tx
Byte Count Register Ch.1 Tx
Data FIFO Register Ch.1 Lo Tx
Data FIFO Register Ch.1 Hi Tx
DMA Control Register Ch.2 Tx
FIFO Control & Status Register Ch.2 Tx
Segment Register Ch.2 Tx
Buffer Base Register Ch.2 Tx
Buffer Bound Register Ch.2 Tx
Address Pointer Reg Ch.2 Tx
Byte Count Register Ch.2 Tx
Data FIFO Register Ch.2 Lo Tx
Data FIFO Register Ch.2 Hi Tx
DMA Control Register Ch.3 Tx
FIFO Control & Status Register Ch.3 Tx
Segment Register Ch. 3 Tx
Buffer Base Register Ch. 3 Tx
Buffer Bound Register Ch.3 Tx
Address Pointer Reg Ch.3 Tx
Byte Count Register Ch.3 Tx
Data FIFO Register Ch.3 Lo Tx
Data FIFO Register Ch.3 Hi Tx
Rx Character Time Out Register Ch.0
Rx Character Time Out Register Ch.1
Rx Character Time Out Register Ch.2
Rx Character Time Out Register Ch.3
Global DMA Interrupt Register
GPOut
BDAEE (H4 Only)
BDCS (H4 Only)
Read/Write
or Read Only
Size
Address
Offset
Description
14E = Byte2 = older
R/W
16
14Eh
14F = Byte3 = younger
R/W
8
150h Control Register
R/W
8
151h Control & Status Register
R/W
8
152h Points to 64 k data segment
R/W
8
154h
Wrap Reload Value for A15 – A8, A7 – A0 reloaded
to zero by hardware
R/W
16
156h Upper Bound (plus 1) on A15 – A0
R/W
16
158h Current Address pointer A15 – A0
R/W
16
15Ah
Corresponds to A15 – A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
R/W
16
15Ch Byte0 & 1
R/W
16
15Eh Byte2 & 3
R/W
8
160h Control Register
R/W
8
161h Control & Status Register
R/W
8
162h Points to 64 k data segment
R/W
8
164h
Wrap Reload Value for A15 – A8, A7 – A0 reloaded
to zero by hardware
R/W
16
166h Upper Bound (plus 1) on A15 – A0
R/W
16
168h Current Address pointer A15 – A0
R/W
16
16Ah
Corresponds to A15 – A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
R/W
16
16Ch Byte0 & 1
R/W
16
16Eh Byte2 & 3
R/W
8
170h Control Register
R/W
8
171h Control & Status Register
R/W
8
172h Points to 64 k data segment
Wrap Reload Value for A15 – A8,
R/W
8
174h
A7 – A0 reloaded to zero by hardware
R/W
16
176h Upper Bound (plus 1) on A15 – A0
R/W
16
178h Current Address pointer A15 – A0
R/W
16
17Ah
Corresponds to A15 – A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
R/W
16
17Ch Byte0 & 1
R/W
16
17Eh Byte2 & 3
R/W
180-1FEh RESERVED for future DMA
Miscellaneous DMA Registers
R/W
8
200h 0 value disables counter interrupt
R/W
8
202h Same as above, for Rx1
R/W
8
204h Same as above, for Rx2
R/W
8
206h Same as above, for Rx3
R/W
16
210h DMA Interrupt Flags
GPOut[7] drives pin 98 (GPOut) through an inverter.
R/W
8
260h GPOut[6-0] are unused, and must be written with
zeroes.
Autobaud Registers (H4 Only)
R/W
8
270h Autobaud echo enable (H4 Only)
R/W
8
272h Autobaud Control and Status (H4 Only)
Reset
Value
0000h
00h
00h
00h
00h
0000h
0000h
0000h
0000h
0000h
00h
00h
00h
00h
0000h
0000h
0000h
0000h
0000h
00h
00h
00h
00h
0000h
0000h
0000h
0000h
0000h
–
00h
00h
00h
00h
0000h
8xh
00h
00h
1999 Sep 24
17