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XA-H4 Datasheet, PDF (16/42 Pages) NXP Semiconductors – Single-chip 16-bit microcontroller
Philips Semiconductors
Single-chip 16-bit microcontroller
Preliminary specification
XA-H4
MMR Name
Buffer Base Register Ch. 1 Rx
Buffer Bound Register Ch.1 Rx
Address Pointer Reg Ch.1 Rx
Byte Count Register Ch.1 Rx
Data FIFO Register Ch.1 Lo Rx
Data FIFO Register Ch.1 Hi Rx
DMA Control Register Ch.2 Rx
FIFO Control & Status Register Ch.2 Rx
Segment Register Ch. 2 Rx
Buffer Base Register Ch. 2 Rx
Buffer Bound Register Ch.2 Rx
Address Pointer Reg Ch.2 Rx
Byte Count Register Ch.2 Rx
Data FIFO Register Ch.2 Lo Rx
Data FIFO Register Ch.2 Hi Rx
DMA Control Register Ch.3 Rx
FIFO Control & Status Register Ch.3 Rx
Segment Register Ch. 3 Rx
Buffer Base Register Ch. 3 Rx
Buffer Bound Register Ch.3 Rx
Address Pointer Reg Ch.3 Rx
Byte Count Register Ch.3 Rx
Data FIFO Register Ch.3 Lo Rx
Data FIFO Register Ch.3 Hi Rx
DMA Control Register Ch.0 Tx
FIFO Control & Status Register Ch.0 Tx
Segment Register Ch. 0 Tx
Buffer Base Register Ch. 0 Tx
Buffer Bound Register Ch.0 Tx
Address Pointer Reg Ch.0 Tx
Byte Count Register Ch.0 Tx
Data FIFO Register Ch.0 Tx
Read/Write
or Read Only
Size
Address
Offset
Description
Reset
Value
R/W
8
114h
Wrap Reload Value for A15 – A8, A7 – A0 reloaded
to zero by hardware
00h
R/W
16
116h Upper Bound (plus 1) on A15 – A0
0000h
R/W
16
118h Current Address pointer A15 – A0
0000h
R/W
16
11Ah
Corresponds to A15 – A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
0000h
11Ch = Byte 0 = older,
00h
R/W
16
11Ch
11Dh = Byte 1 = younger
00h
11Eh = Byte 2 = older,
00h
R/W
16
11Eh
11Fh = Byte 3 = younger
00h
R/W
8
120h Control Register
00h
R/W
8
121h Control & Status Register
00h
R/W
8
122h Points to 64 k data segment
00h
R/W
8
124h
Wrap Reload Value for A15 – A8, A7 – A0 reloaded to
zero by hardware
00h
R/W
16
126h Upper Bound (plus 1) on A15 – A0
0000h
R/W
16
128h Current Address pointer A15 – A0
0000h
R/W
16
12Ah
Corresponds to A15 – A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
0000h
12Ch = Byte 0 = older,
00h
R/W
16
12Ch
12Dh = Byte 1 = younger
00h
12Eh = Byte 2 = older,
00h
R/W
16
12Eh
12Fh = Byte 3 = younger
00h
R/W
8
130h Control Register
00h
R/W
8
131h Control & Status Register
00h
R/W
8
132h Points to 64 k data segment
00h
R/W
8
134h
Wrap Reload Value for A15 – A8, A7 – A0 reloaded to
zero by hardware
00h
R/W
16
136h Upper Bound (plus 1) on A15 – A0
0000h
R/W
16
138h Current Address pointer A15 – A0
0000h
R/W
16
13Ah
Corresponds to A15 – A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
0000h
13Ch = Byte 0 = older,
00h
R/W
16
13Ch
13Dh = Byte 1 = younger
00h
13Eh = Byte 2 = older,
00h
R/W
16
13Eh
13Fh = Byte 3 = younger
00h
Tx DMA Registers
R/W
8
140h Control Register
00h
R/W
8
141h Control & Status Register
00h
R/W
8
142h Points to 64 k data segment
00h
R/W
8
144h
Wrap Reload Value for A15 – A8, A7 – A0 reloaded
to zero by hardware
00h
R/W
16
146h Upper Bound (plus 1) on A15 – A0
0000h
R/W
16
148h Current Address pointer A15 – A0
0000h
R/W
16
14Ah
Corresponds to A15 – A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
0000h
14C = Byte0 = older
R/W
16
14Ch
14D = Byte 1 = younger
0000h
1999 Sep 24
16