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XA-H4 Datasheet, PDF (14/42 Pages) NXP Semiconductors – Single-chip 16-bit microcontroller
Philips Semiconductors
Single-chip 16-bit microcontroller
Preliminary specification
XA-H4
MMR Name
USART1 Write Register 14
USART1 Write Register 15
USART1 Write Register 16
USART1 Write Register 17
USART1 Read Register 0
USART1 Read Register 1
Reserved
USART1 Read Register 3
see WR16 and WR17
USART1 Read Register 6
USART1 Read Register 7
USART1 Read Register 8
Reserved
USART1 Read Register 10
Reserved
USART2 Write Register 0
USART2 Write Register 1
USART2 Write Register 2
USART2 Write Register 3
USART2 Write Register 4
USART2 Write Register 5
USART2 Write Register 6
USART2 Write Register 7
USART2 Write Register 8
USART2 Write Register 9
USART2 Write Register 10
USART2 Write Register 11
USART2 Write Register 12
USART2 Write Register 13
USART2 Write Register 14
USART2 Write Register 15
USART2 Write Register 16
USART2 Write Register 17
USART2 Read Register 0
USART2 Read Register 1
Reserved
USART2 Read Register 3
see WR16 and WR17
USART2 Read Register 6
USART2 Read Register 7
USART2 Read Register 8
Reserved
USART2 Read Register 10
Reserved
1999 Sep 24
Read/Write
or Read Only
Size
Address
Offset
Description
R/W
8
85Ch Miscellaneous Control bits
R/W
8
85Eh External/Status interrupt control
R/W
8
868h Match Character 2 (WR16)
R/W
8
86Ah Match Character 3 (WR17)
RO
8
860h Tx/Rx buffer and external status
RO
8
862h Receive condition status/residue code
864h
RO
8
866
Interrupt Pending Bits
8
86Ch see WR16 and 17 above
RO
8
86Eh SDLC byte count low register
RO
8
86Eh SDLC byte count high and FIFO status
RO
8
870h Receive Buffer
872h
RO
8
874h Loop/clock status
876-87Eh
USART2 Registers
R/W
8
880h Command register
R/W
8
882h Tx/Rx Interrupt & data transfer mode
R/W
8
884h Extended Features Control
R/W
8
886h Receive Parameter and Control
R/W
8
888h Tx/Rx miscellaneous parameters & mode
R/W
8
88Ah Tx parameter and control
R/W
8
88Ch HDLC/SDLC address field or Match Character 0
R/W
8
88Eh HDLC/SDLC flag or Match Character 1
R/W
8
890h Transmit Data Buffer
R/W
8
892h Master Interrupt control
R/W
8
894h Miscellaneous Tx/Rx control register
R/W
8
896h Clock Mode Control
R/W
8
898h Lower Byte of Baud rate time constant
R/W
8
89Ah Upper Byte of Baud rate time constant
R/W
8
89Ch Miscellaneous Control bits
R/W
8
89Eh External/Status interrupt control
R/W
8
8A8h Match Character 2 (WR16)
R/W
8
8AAh Match Character 3 (WR17)
RO
8
8A0h Tx/Rx buffer and external status
RO
8
8A2h Receive condition status
8A4h
RO
8
8A6h Interrupt Pending Bits
8
8ACh see WR16 and 17 above
RO
8
8AEh SDLC byte count low register
RO
8
8AEh SDLC byte count high and FIFO status
RO
8
8B0h Receive Buffer
8B2h
RO
8
8B4h Loop/clock status
8B6-8BEh
Reset
Value
xx
f8h
00h
00h
00h
xx
xx
00h
00h
00h
00h
xx
xx
xx
00h
xx
00h
00h
xx
f8h
00h
00h
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