ASX340AT Datasheet, PDF (75/75 Pages) ON Semiconductor – Color CMOS NTSC/PAL Digital Image

ASX340CS: 1/4-Inch Color CMOS NTSC/PAL Digital Image Sensor
Revision History
• Updated Figure 51: “63-Ball iBGA Package Outline Drawing,” on page 73
Rev. D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9/25/12
• Updated Table 38, “Electrical Characteristics and Operating Conditions,” on page 63
• Updated Table 39, “Video DAC Electrical Characteristics–Single-Ended Mode,” on
page 63
• Updated “Power Consumption, Operating Mode” on page 65
• Updated Table 44, “NTSC Signal Parameters,” on page 66
• Updated Table 45, “Video Timing: Specification from Rec. ITU-R BT.470,” on page 67
• Updated Table 46, “Equalizing Pulse: Specification from Rec. ITU-R BT.470,” on
page 68
• Updated Table 47, “V Pulse: Specification from Rec. ITU-R BT.470,” on page 69
• Updated note for Figure 50: “Quantum Efficiency,” on page 72
Rev. C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7/18/12
• Updated Figure 49: “Two-Wire Serial Bus Timing Parameters,” on page 70
• Updated Table 41, “Digital I/O Parameters,” on page 64
• Updated Table 48, “Two-Wire Serial Bus Characteristics,” on page 70
Rev. B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4/18/12
• Updated to Production
• Updated Table 1: “Key Parameters,” on page 1
• Updated Table 6, “Reset/Default State of Interfaces,” on page 12
• Updated “Pixel Array Structure” on page 15
• Updated “FOV Stretch Support” on page 25
• Updated Table 29, “Parallel Digital Output I/O Timing,” on page 56
• Updated Table 30, “Slew Rate for PIXCLK and DOUT,” on page 57
• Updated Table 32, “Power Up Sequence,” on page 59
• Updated Table 33, “Power Down Sequence,” on page 60
• Updated Table 34, “FRAME_SYNC to FRAME_VALID/LINE_VALID Parameters,” on
page 60
• Updated Table 38, “Electrical Characteristics and Operating Conditions,” on page 63
• Updated Figure 51: “63-Ball iBGA Package Outline Drawing,” on page 73
Rev. A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11/10/11
• Initial release
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ASX340AT/D Rev. H, 8/15 EN
75
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