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ASX340AT Datasheet, PDF (74/75 Pages) ON Semiconductor – Color CMOS NTSC/PAL Digital Image | |||
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ASX340CS: 1/4-Inch Color CMOS NTSC/PAL Digital Image Sensor
Revision History
Revision History
Rev. H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8/31/15
⢠Updated âOrdering Informationâ on page 3
Rev. G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6/1/15
⢠Updated âOrdering Informationâ on page 3
Rev. F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5/29/15
⢠Updated âOrdering Informationâ on page 3
⢠Removed Confidential marking
Rev. E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11/12/14
⢠Applied ON Semiconductor template
⢠Updated Table 2, âKey Parameters (continued),â on page 2
⢠Updated Figure 2: âSystem Block Diagram,â on page 8
⢠Updated note to Figure 3: âUsing a Crystal Instead of an External Oscillator,â on
page 9
⢠Updated Table 4, âPin Descriptions,â on page 10
⢠Updated âPixel Array Structureâ on page 15
⢠Updated Figure 5: âPixel Array Description,â on page 14
⢠Updated âPower Sequenceâ on page 29
⢠Updated âHost Command Interfaceâ on page 31
⢠Updated âSlave Two-Wire Serial Interfaceâ on page 37
⢠Updated âOverlay Capabilityâ on page 42
⢠Changed heading âSerial Memory Partitionâ to âNVM Partitionâ on page 43
⢠Updated âExternal Memory Speed Requirementâ on page 43
⢠Updated âOverlay Adjustmentâ on page 44
⢠Updated Figure 34: âNTSC Block,â on page 55
⢠Updated Table 29, âParallel Digital Output I/O Timing,â on page 56
⢠Updated âResetâ on page 52
⢠Updated âClocksâ on page 52
⢠Updated Table 31, âConfiguration Timing,â on page 58
⢠Updated Table 32, âPower Up Sequence,â on page 59
⢠Updated Figure 39: âPower Up Sequence,â on page 59
⢠Updated Table 34, âFRAME_SYNC to FRAME_VALID/LINE_VALID Parameters,â on
page 60
⢠Updated Table 35, âRESET_BAR Delay Parameters,â on page 61
⢠Updated Table 37, âAbsolute Maximum Ratings,â on page 62
⢠Updated Table 39, âVideo DAC Electrical CharacteristicsâSingle-Ended Mode,â on
page 63
⢠Updated Table 40, âVideo DAC Electrical CharacteristicsâDifferential Mode,â on
page 64
⢠Updated Table 41, âDigital I/O Parameters,â on page 64
⢠Updated Table 42, âPower Consumption â Condition 1,â on page 65
⢠Updated Table 43, âPower Consumption â Condition 2,â on page 65
⢠Updated Table 44, âNTSC Signal Parameters,â on page 66
⢠Updated Figure 46: âVideo Timing,â on page 67
⢠Updated Figure 50: âQuantum Efficiency,â on page 72
ASX340AT/D Rev. H, 8/15 EN
74
©Semiconductor Components Industries, LLC, 2015.
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