ASX340AT Datasheet, PDF (43/75 Pages) ON Semiconductor – Color CMOS NTSC/PAL Digital Image

ASX340CS: 1/4-Inch Color CMOS NTSC/PAL Digital Image Sensor
NVM Partition
NVM Partition
The contents of the Flash/EEPROM memory partition logically into three blocks (see
Figure 24):
• Memory for overlay data and descriptors
• Memory for register settings, which may be loaded at boot-up
• Firmware extensions or software patches; in addition to the on-chip firmware, exten-
sions reside in this block of memory
These blocks are not necessarily contiguous.
Figure 24: Memory Partitioning
Flash
PartFiltaisohning
Partitioning
FFiixxedd-sSizize e
O^Ov^ve^err^ll^aa^yy^ss^–-^RR^LL^E E
F_Fi_ix_xe_edd_-sS_izi_ez e
O^Ov^ve^rll^aa^yy^ss^–- ^RR^LL^EE
1₁2₂-_Bb_yy_tt_ee _HH_ee_aa_dd_ee_rr
O^Ove^vr^ela^ry^laD^yata
Data
Lens Shading
Correction
Parameter
AlAteltrenrantaeteReg.
Register Setting
Soft^Sw^/a^Wre^PaP^ta^ct^hch
R^RL^LE^E E^Enⁿc^co^od^de^ed^d
2^DD2k^aKBa^ty^Btaate
External Memory Speed Requirement
For a 2 KB block of overlay to be transferred within a frame time to achieve maximum
update rate, the SPI NVM must operate at a certain minimum speed.
Table 23: Transfer Time Estimate
Frame Time
33.3ms
SPI Clock
4.5 MHz
Transfer Time for 2 KB
1ms
ASX340AT/D Rev. H, 8/15 EN
43
©Semiconductor Components Industries, LLC, 2015.