ASX340AT Datasheet, PDF (58/75 Pages) ON Semiconductor – Color CMOS NTSC/PAL Digital Image

ASX340CS: 1/4-Inch Color CMOS NTSC/PAL Digital Image Sensor
Modes and Timing
Configuration Timing
During start-up, the Dout_LSB0, LV and FV are sampled. Setup and hold timing for the
RESET_BAR signal with respect to DOUT_LSB0, LV, and FV are shown in Figure 38 and
Table 31. These signals are sampled once by the on-chip firmware, which yields a long
tHOLD _time.
Figure 38: Configuration Timing
RESET_BAR
DOUT_LSB0
FRAME_VALID
LINE_VALID
t_SETUP
t_HOLD
Valid Data
Table 31:
Configuration Timing
Signal
DOUT_LSB0, FRAME_VALID, LINE_VALID
Parameter
tSETUP
tHOLD
Note: Table data is based on EXTCLK = 27 MHz.
Min
Typ
Max
Unit
0
s
50
s
ASX340AT/D Rev. H, 8/15 EN
58
©Semiconductor Components Industries, LLC, 2015.