ASX340AT Datasheet, PDF (13/75 Pages) ON Semiconductor – Color CMOS NTSC/PAL Digital Image

ASX340CS: 1/4-Inch Color CMOS NTSC/PAL Digital Image Sensor
Pin Descriptions and Assignments
Table 6:
Reset/Default State of Interfaces (continued)
Name
PIXCLK
DOUT7
DOUT6
DOUT5
DOUT4
DOUT3
DOUT2
DOUT1
DOUT0
DOUT_LSB1
DOUT_LSB0
DAC_POS
DAC_NEG
DAC_REF
TDI
TDO
TMS
TCK
TRST_N
FRAME_SYNC
GPIO12
GPIO13
ATEST1
ATEST2
Reset State
High impedance
Default State
Driven, logic 0
Notes
Output. This interface disabled by default.
See Note 1.
High impedance
High impedance
High impedance
High impedance
High impedance
Driven
Input/Output. This interface disabled by
default. Input buffers (used for GPIO function)
powered down by default, so these pins can
be left unconnected (floating). After reset,
these pins are powered-up, sampled, then
powered down again as part of the auto-
configuration mechanism.
Output. Interface disabled by hardware reset
and enabled by default when the device starts
streaming.
Internal pull-up enabled
High impedance
Internal pull-up enabled
Internal pull-up enabled
N/A
N/A
High impedance
High impedance
N/A
N/A
Internal pull-up enabled
High impedance
Internal pull-up enabled
Internal pull-up enabled
N/A
N/A
High impedance
High impedance
N/A
N/A
Input. Internal pull-up means that this pin can
be left unconnected (floating).
Output. Driven only during appropriate parts
of the JTAG shifter sequence.
Input. Internal pull-up means that this pin can
be left unconnected (floating).
Input. Internal pull-up means that this pin can
be left unconnected (floating).
Input. Must always be driven to a valid logic
level. Must be driven to GND for normal
operation.
Input. Must always be driven to a valid logic
level. Must be driven to GND if not used.
Input/Output. This interface disabled by
default. Input buffers (used for GPIO function)
powered down by default, so these pins can
be left unconnected (floating)
Input/Output. This interface disabled by
default. Input buffers (used for GPIO function)
powered down by default, so these pins can
be left unconnected (floating).
Must be driven to GND for normal operation.
Must be driven to GND for normal operation.
Notes:
1. The reason for defining the default state as logic 0 rather than high impedance is this: when wired
in a system (for example, on ON Semiconductor’s demo boards), these outputs will be connected,
and the inputs to which they are connected will want to see a valid logic level. No current drain
should result from driving these to a valid logic level (unless there is a pull-up at the system level).
2. These pads have their input circuitry powered down, but they are not output-enabled. Therefore,
they can be left floating but they will not drive a valid logic level to an attached device.
ASX340AT/D Rev. H, 8/15 EN
13
©Semiconductor Components Industries, LLC, 2015.