AR0833 Datasheet, PDF (47/64 Pages) ON Semiconductor – 8 Mp CMOS Digital Image Sensor

AR0833: 1/3.2-Inch 8 Mp CMOS Digital Image Sensor
Integration Time for Interlaced HDR Readout
Entering and Leaving the Global Reset Sequence
A global reset sequence can be triggered by a register write to R0x315E global_se-
q_trigger[0] (global trigger, to transition this bit from a 0 to a 1) or by a rising edge on a
suitably-configured GPI input).
When a global reset sequence is triggered, the sensor waits for the end of the current row.
When LV negates for that row, FV is negated 6 PIXCLK periods later, potentially trun-
cating the frame that was in progress.
The global reset sequence completes with a frame readout. At the end of this readout
phase, the sensor automatically resumes operation in ERS mode. The first frame inte-
grated with ERS will be generated after a delay of approximately ((13 + coarse_integra-
tion_time) * line_length_pck). This sequence is shown in Figure 33.
While operating in ERS mode, double-buffered registers (“Double-Buffered Registers”
on page 23) are updated at the start of each frame in the usual way. During the global
reset sequence, double-buffered registers are updated just before the start of the readout
phase.
Figure 33: Entering and Leaving a Global Reset Sequence
Trigger
Wait for end of current row
Automatic at end of frame readout
ERS
Row Reset
Integration
Readout
ERS
Programmable Settings
The registers global_rst_end and global_read_start allow the duration of the row reset
phase and the integration phase to be controlled, as shown in Figure 34. The duration of
the readout phase is determined by the active image size.
The recommended setting for global_rst_end is 0x3160 (for example, 512 s total reset
time) with default vt_pix_clk. This allows sufficient time for all rows of the pixel array to
be set to the correct reset voltage level. The row reset phase takes a finite amount of time
due to the capacitance of the pixel array and the capability of the internal voltage
booster circuit that is used to generate the reset voltage level.
As soon as the global_rst_end count has expired, all rows in the pixel array are taken out
of reset simultaneously and the pixel array begins to integrate incident light.
Figure 34: Controlling the Reset and Integration Phases of the Global Reset Sequence
Trigger
Wait for end of current row
Automatic at end of frame readout
ERS Row Reset
Integration
Readout ERS
global_rst_end
global_read_start
AR0833_DS Rev. H Pub. 4/15 EN
47
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