AR0833 Datasheet, PDF (45/64 Pages) ON Semiconductor – 8 Mp CMOS Digital Image Sensor

AR0833: 1/3.2-Inch 8 Mp CMOS Digital Image Sensor
Integration Time for Interlaced HDR Readout
Flash Timing Control
The AR0833 supports both xenon and LED flash timing through the FLASH output
signal. The timing of the FLASH signal with the default settings is shown in Figure 30
(xenon) and Figure 31 on page 45 (LED). The flash and flash_count registers allow the
timing of the flash to be changed. The flash can be programmed to fire only once,
delayed by a few frames when asserted, and (for xenon flash) the flash duration can be
programmed.
Enabling the LED flash will cause one bad frame, where several of the rows only have the
flash on for part of their integration time. This can be avoided either by first enabling
mask bad frames (R0x301A[9] = 1) before the enabling the flash or by forcing a restart
(R0x301A[1] = 1) immediately after enabling the flash; the first bad frame will then be
masked out, as shown in Figure 31. Read-only bit flash[14] is set during frames that are
correctly integrated; the state of this bit is shown in Figures 30 and Figure 31.
Figure 30: Xenon Flash Enabled
FRAME_VALID
Flash STROBE
State ofTriggered Bit
(R0x3046-7[14])
Figure 31: LED Flash Enabled
FRAME_VALID
Flash STROBE
State of Triggered Bit
(R0x3046-7[14])
Note:
Bad frame
is masked
Flash enabled
during this frame
Bad frame
is masked
Good frame
Good frame Flash disabled
during this frame
An option to invert the flash output signal through R0x3046[7] is also available.
AR0833_DS Rev. H Pub. 4/15 EN
45
©Semiconductor Components Industries, LLC, 2015.