AR0833 Datasheet, PDF (39/64 Pages) ON Semiconductor – 8 Mp CMOS Digital Image Sensor

AR0833: 1/3.2-Inch 8 Mp CMOS Digital Image Sensor
Integration Time for Interlaced HDR Readout
Figure 28: Bin2Pixel Readout (x_odd_inc = 3, y_odd_inc = 3, x_bin = 1)
X incrementing
Binning address sequencing is a bit more complicated than during subsampling only,
because of the implementation of the binning itself.
For a given column n, there is only one other column, n_bin, that can be binned with,
because of physical limitations in the column readout circuitry. The possible address
sequences are shown in Table 12.
Table 12: Column Address Sequencing During Binning
odd_inc = 1 (Normal)
x_addr_start = 0
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
odd_inc = 3 (2X Bin)
x_addr_start = 0
0/2
1/3
4/6
5/7
8/10
9/11
12/14
13/15
odd_inc = 7 (2X Skip + 2XBin)
x_addr_start = 0
0/4
1/5
8/12
9/13
There are no physical limitations on what can be binned together in the row direction. A
given row n will always be binned with row n+2 in 2X subsampling mode and with row
n+4 in 4X subsampling mode. Therefore, which rows get binned together depends upon
the alignment of y_addr_start. The possible sequences are shown in Table 13 on page 40.
AR0833_DS Rev. H Pub. 4/15 EN
39
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