AR0833 Datasheet, PDF (23/64 Pages) ON Semiconductor – 8 Mp CMOS Digital Image Sensor

AR0833: 1/3.2-Inch 8 Mp CMOS Digital Image Sensor
Registers
Byte Ordering
Address Alignment
Bit Representation
Data Format
Registers that occupy more than one byte of address space are shown with the lowest
address in the highest-order byte lane to match the byte-ordering on the data bus. For
example, the chip_version_reg register is R0x0000–1. In the register table the default
value is shown as 0x4B00. This means that a read from address 0x0000 would return
0x4B, and a read from address 0x0001 would return 0x00. When reading this register as
two 8-bit transfers on the serial interface, the 0x4B will appear on the serial interface
first, followed by the 0x00.
All register addresses are aligned naturally. Registers that occupy 2 bytes of address space
are aligned to even 16-bit addresses, and registers that occupy 4 bytes of address space
are aligned to 16-bit addresses that are an integer multiple of 4.
For clarity, 32-bit hex numbers are shown with an underscore between the upper and
lower 16 bits. For example: 0x3000_01AB.
Most registers represent an unsigned binary value or set of bit fields. For all other register
formats, the format is stated explicitly at the start of the register description. The nota-
tion for these formats is shown in Table 10.
Table 10: Data Formats
Name
FIX16
UFIX16
FLP32
Description
Signed fixed-point, 16-bit number: two’s complement number, 8 fractional bits.
Examples: 0x0100 = 1.0, 0x8000 = –128, 0xFFFF = –0.0039065
Unsigned fixed-point, 16-bit number: 8.8 format. Examples: 0x0100 = 1.0, 0x280 = 2.5
Signed floating-point, 32-bit number: IEEE 754 format. Example: 0x4280_0000 = 64.0
Register Behavior
Registers vary from “read-only,” “read/write,” and “read, write-1-to-clear.”
Double-Buffered Registers
Some sensor settings cannot be changed during frame readout. For example, changing
R0x3004–5 (x_addr_start) partway through frame readout would result in inconsistent
row lengths within a frame. To avoid this, the AR0833 double-buffers many registers by
implementing a “pending” and a “live” version. Reads and writes access the pending
register. The live register controls the sensor operation.
The value in the pending register is transferred to a live register at a fixed point in the
frame timing, called frame start. Frame start is defined as the point at which the first
dark row is read out internally to the sensor. In the register tables the “Frame Sync’d”
column shows which registers or register fields are double-buffered in this way.
AR0833_DS Rev. H Pub. 4/15 EN
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