NT3H2211W0FHKH Datasheet, PDF (8/77 Pages) NXP Semiconductors – NTAG I2C plus, NFC Forum Type 2 Tag compliant IC with I2C interface

NXP Semiconductors
NT3H2111/NT3H2211
NFC Forum Type 2 Tag compliant IC with I²C interface
8. Functional description
8.1 Block description
NTAG I²C plus ICs consist of EEPROM, SRAM, NFC interface, Digital Control Unit
(Command interpreter, Anticollision, Arbiter/Status registers, I²C control and Memory
Interface), Power Management and Energy Harvesting Unit and an I²C slave interface.
Energy and data are transferred via an antenna consisting of a coil with a few turns, which
is directly connected to NTAG I²C plus IC.
8.2 NFC interface
The passive NFC-interface is based on the ISO/IEC 14443-3 Type A standard.
It requires to be supplied by an NFC field (e.g. NFC enabled device) always to be able to
receive appropriate commands and send the related responses.
As defined in ISO/IEC 14443-3 Type A for both directions of data communication, there is
one start bit (start of communication) at the beginning of each frame. Each byte is
transmitted with an odd parity bit at the end. The LSB of the byte with the lowest address
of the selected block is transmitted first.
For a multi-byte parameter, the least significant byte is always transmitted first. For
example, when reading from the memory using the READ command, byte 0 from the
addressed block is transmitted first, followed by bytes 1 to byte 3 out of this block. The
same sequence continues for the next block and all subsequent blocks.
8.2.1 Data integrity
The following mechanisms are implemented in the contactless communication link
between the NFC device and the NTAG I²C plus IC to ensure very reliable data
transmission:
• 16 bits CRC per block
• Parity bits for each byte
• Bit count checking
• Bit coding to distinguish between “1”, “0” and “no information”
• Channel monitoring (protocol sequence and bit stream analysis)
The commands are initiated by the NFC device and controlled by the Digital Control Unit
of the NTAG I²C plus IC. The command response depends on the state of the IC, and for
memory operations, the access conditions valid for the corresponding page.
NT3H2111/NT3H2211
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.0 — 3 February 2016
359930
© NXP Semiconductors N.V. 2016. All rights reserved.
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